Searched refs:Dst1Reg (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 420 Register Dst1Reg = I.getOperand(1).getReg(); in selectG_UADDO_USUBO_UADDE_USUBE() local
426 if (isVCC(Dst1Reg, *MRI)) { in selectG_UADDO_USUBO_UADDE_USUBE()
451 if (MRI->use_nodbg_empty(Dst1Reg)) { in selectG_UADDO_USUBO_UADDE_USUBE()
454 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), Dst1Reg) in selectG_UADDO_USUBO_UADDE_USUBE()
456 if (!MRI->getRegClassOrNull(Dst1Reg)) in selectG_UADDO_USUBO_UADDE_USUBE()
457 MRI->setRegClass(Dst1Reg, &AMDGPU::SReg_32RegClass); in selectG_UADDO_USUBO_UADDE_USUBE()
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| H A D | AMDGPULegalizerInfo.cpp | 6583 Register Dst1Reg; in legalizeImageIntrinsic() local
6603 Dst1Reg = MI.getOperand(1).getReg(); in legalizeImageIntrinsic()
6604 if (MRI->getType(Dst1Reg) != S32) in legalizeImageIntrinsic()
6612 B.buildUnmerge({DstReg, Dst1Reg}, NewResultReg); in legalizeImageIntrinsic()
6619 SmallVector<Register, 5> ResultRegs(ResultNumRegs, Dst1Reg); in legalizeImageIntrinsic()
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