Searched refs:Dst1 (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 878 [&](const MachineBasicBlock *Dst0, const MachineBasicBlock *Dst1) { in selectSuccBB() argument
880 Prob.getEdgeProbability(&B, Dst1); in selectSuccBB()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 386 MachineOperand &Dst1 = MI->getOperand(1); in updateOperand() local
387 assert(Dst0.isDef() && Dst1.isDef()); in updateOperand()
389 bool HaveNonDbgCarryUse = !MRI->use_nodbg_empty(Dst1.getReg()); in updateOperand()
398 Dst1.getReg()) in updateOperand()
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| H A D | AMDGPUInstructionSelector.cpp | 975 Register Dst1 = MI.getOperand(1).getReg(); in selectDivScale() local
998 .addDef(Dst1) in selectDivScale()
2045 Register Dst1 = MI.getOperand(1).getReg(); in selectDSBvhStackIntrinsic() local
2056 .addDef(Dst1) in selectDSBvhStackIntrinsic()
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| H A D | AMDGPURegisterBankInfo.cpp | 1562 Register Dst1 = MI.getOperand(1).getReg(); in applyMappingMAD_64_32() local
1693 B.buildCopy(Dst1, Carry); in applyMappingMAD_64_32()
1695 B.buildTrunc(Dst1, Carry); in applyMappingMAD_64_32()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 1128 Register Dst1 = MI.getOperand(0).getReg(); in applyUnmergeExtToUnmerge() local
1130 MI.getOperand(1).setReg(Dst1); in applyUnmergeExtToUnmerge()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 7938 auto [Dst0, Dst0Ty, Dst1, Dst1Ty, LHS, LHSTy, RHS, RHSTy] = in lowerSADDO_SSUBO()
7967 MIRBuilder.buildXor(Dst1, ConditionRHS, ResultLowerThanLHS); in lowerSADDO_SSUBO()
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