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Searched refs:Dst0Reg (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp2238 Register Dst0Reg = MI.getOperand(0).getReg(); in applyCombineUnmergeWithDeadLanesToTrunc() local
2239 Builder.buildTrunc(Dst0Reg, SrcReg); in applyCombineUnmergeWithDeadLanesToTrunc()
2246 Register Dst0Reg = MI.getOperand(0).getReg(); in matchCombineUnmergeZExtToZExt() local
2247 LLT Dst0Ty = MRI.getType(Dst0Reg); in matchCombineUnmergeZExtToZExt()
2273 Register Dst0Reg = MI.getOperand(0).getReg(); in applyCombineUnmergeZExtToZExt() local
2281 LLT Dst0Ty = MRI.getType(Dst0Reg); in applyCombineUnmergeZExtToZExt()
2285 Builder.buildZExt(Dst0Reg, ZExtSrcReg); in applyCombineUnmergeZExtToZExt()
2289 replaceRegWith(MRI, Dst0Reg, ZExtSrcReg); in applyCombineUnmergeZExtToZExt()
H A DLegalizerHelper.cpp1977 Register Dst0Reg = MI.getOperand(0).getReg(); in widenScalarUnmergeValues() local
1978 LLT DstTy = MRI.getType(Dst0Reg); in widenScalarUnmergeValues()
2007 MIRBuilder.buildTrunc(Dst0Reg, SrcReg); in widenScalarUnmergeValues()
7490 Register Dst0Reg = MI.getOperand(0).getReg(); in lowerUnmergeValues() local
7491 LLT DstTy = MRI.getType(Dst0Reg); in lowerUnmergeValues()
7502 MIRBuilder.buildTrunc(Dst0Reg, SrcReg); in lowerUnmergeValues()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp419 Register Dst0Reg = I.getOperand(0).getReg(); in selectG_UADDO_USUBO_UADDE_USUBE() local
447 auto CarryInst = BuildMI(*BB, &I, DL, TII.get(HasCarryIn ? CarryOpc : NoCarryOpc), Dst0Reg) in selectG_UADDO_USUBO_UADDE_USUBE()
460 if (!RBI.constrainGenericRegister(Dst0Reg, AMDGPU::SReg_32RegClass, *MRI) || in selectG_UADDO_USUBO_UADDE_USUBE()