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Searched refs:Dst0Reg (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp2339 Register Dst0Reg = MI.getOperand(0).getReg(); in applyCombineUnmergeWithDeadLanesToTrunc() local
2340 Builder.buildTrunc(Dst0Reg, SrcReg); in applyCombineUnmergeWithDeadLanesToTrunc()
2347 Register Dst0Reg = MI.getOperand(0).getReg(); in matchCombineUnmergeZExtToZExt() local
2348 LLT Dst0Ty = MRI.getType(Dst0Reg); in matchCombineUnmergeZExtToZExt()
2374 Register Dst0Reg = MI.getOperand(0).getReg(); in applyCombineUnmergeZExtToZExt() local
2382 LLT Dst0Ty = MRI.getType(Dst0Reg); in applyCombineUnmergeZExtToZExt()
2386 Builder.buildZExt(Dst0Reg, ZExtSrcReg); in applyCombineUnmergeZExtToZExt()
2390 replaceRegWith(MRI, Dst0Reg, ZExtSrcReg); in applyCombineUnmergeZExtToZExt()
H A DLegalizerHelper.cpp2275 Register Dst0Reg = MI.getOperand(0).getReg(); in widenScalarUnmergeValues() local
2276 LLT DstTy = MRI.getType(Dst0Reg); in widenScalarUnmergeValues()
2305 MIRBuilder.buildTrunc(Dst0Reg, SrcReg); in widenScalarUnmergeValues()
8411 Register Dst0Reg = MI.getOperand(0).getReg(); in lowerUnmergeValues() local
8412 LLT DstTy = MRI.getType(Dst0Reg); in lowerUnmergeValues()
8423 MIRBuilder.buildTrunc(Dst0Reg, SrcReg); in lowerUnmergeValues()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp517 Register Dst0Reg = I.getOperand(0).getReg(); in selectG_UADDO_USUBO_UADDE_USUBE() local
545 auto CarryInst = BuildMI(*BB, &I, DL, TII.get(HasCarryIn ? CarryOpc : NoCarryOpc), Dst0Reg) in selectG_UADDO_USUBO_UADDE_USUBE()
558 if (!RBI.constrainGenericRegister(Dst0Reg, AMDGPU::SReg_32RegClass, *MRI) || in selectG_UADDO_USUBO_UADDE_USUBE()