Home
last modified time | relevance | path

Searched refs:DppCtrl (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp974 if (Imm <= DppCtrl::QUAD_PERM_LAST) { in printDPPCtrl()
980 } else if ((Imm >= DppCtrl::ROW_SHL_FIRST) && in printDPPCtrl()
981 (Imm <= DppCtrl::ROW_SHL_LAST)) { in printDPPCtrl()
982 O << "row_shl:" << formatDec(Imm - DppCtrl::ROW_SHL0); in printDPPCtrl()
983 } else if ((Imm >= DppCtrl::ROW_SHR_FIRST) && in printDPPCtrl()
984 (Imm <= DppCtrl::ROW_SHR_LAST)) { in printDPPCtrl()
985 O << "row_shr:" << formatDec(Imm - DppCtrl::ROW_SHR0); in printDPPCtrl()
986 } else if ((Imm >= DppCtrl::ROW_ROR_FIRST) && in printDPPCtrl()
987 (Imm <= DppCtrl::ROW_ROR_LAST)) { in printDPPCtrl()
988 O << "row_ror:" << formatDec(Imm - DppCtrl::ROW_ROR0); in printDPPCtrl()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNDPPCombine.cpp549 auto *DppCtrl = TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl); in combineDPPMov() local
550 assert(DppCtrl && DppCtrl->isImm()); in combineDPPMov()
551 if (!AMDGPU::isLegalDPALU_DPPControl(DppCtrl->getImm())) { in combineDPPMov()
H A DSIInstrInfo.cpp5389 if (DC == DppCtrl::DPP_UNUSED1 || DC == DppCtrl::DPP_UNUSED2 || in verifyInstruction()
5390 DC == DppCtrl::DPP_UNUSED3 || DC > DppCtrl::DPP_LAST || in verifyInstruction()
5391 (DC >= DppCtrl::DPP_UNUSED4_FIRST && DC <= DppCtrl::DPP_UNUSED4_LAST) || in verifyInstruction()
5392 (DC >= DppCtrl::DPP_UNUSED5_FIRST && DC <= DppCtrl::DPP_UNUSED5_LAST) || in verifyInstruction()
5393 (DC >= DppCtrl::DPP_UNUSED6_FIRST && DC <= DppCtrl::DPP_UNUSED6_LAST) || in verifyInstruction()
5394 (DC >= DppCtrl::DPP_UNUSED7_FIRST && DC <= DppCtrl::DPP_UNUSED7_LAST) || in verifyInstruction()
5395 (DC >= DppCtrl::DPP_UNUSED8_FIRST && DC <= DppCtrl::DPP_UNUSED8_LAST)) { in verifyInstruction()
5399 if (DC >= DppCtrl::WAVE_SHL1 && DC <= DppCtrl::WAVE_ROR1 && in verifyInstruction()
5405 if (DC >= DppCtrl::BCAST15 && DC <= DppCtrl::BCAST31 && in verifyInstruction()
5411 if (DC >= DppCtrl::ROW_SHARE_FIRST && DC <= DppCtrl::ROW_XMASK_LAST && in verifyInstruction()
[all …]
H A DSIDefines.h921 enum DppCtrl : unsigned { enum
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4967 unsigned DppCtrl = Inst.getOperand(DppCtrlIdx).getImm(); in validateDPP() local
4969 if (!AMDGPU::isLegalDPALU_DPPControl(DppCtrl) && in validateDPP()
9508 return (Imm >= DppCtrl::QUAD_PERM_FIRST && Imm <= DppCtrl::QUAD_PERM_LAST) || in isDPPCtrl()
9509 (Imm >= DppCtrl::ROW_SHL_FIRST && Imm <= DppCtrl::ROW_SHL_LAST) || in isDPPCtrl()
9510 (Imm >= DppCtrl::ROW_SHR_FIRST && Imm <= DppCtrl::ROW_SHR_LAST) || in isDPPCtrl()
9511 (Imm >= DppCtrl::ROW_ROR_FIRST && Imm <= DppCtrl::ROW_ROR_LAST) || in isDPPCtrl()
9512 (Imm == DppCtrl::WAVE_SHL1) || in isDPPCtrl()
9513 (Imm == DppCtrl::WAVE_ROL1) || in isDPPCtrl()
9514 (Imm == DppCtrl::WAVE_SHR1) || in isDPPCtrl()
9515 (Imm == DppCtrl::WAVE_ROR1) || in isDPPCtrl()
[all …]