| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepMapAsm2Intrin.td | 16 def: Pat<(int_hexagon_A2_absp DoubleRegs:$src1),
17 (A2_absp DoubleRegs:$src1)>, Requires<[HasV5]>;
48 def: Pat<(int_hexagon_A2_addp DoubleRegs:$src1, DoubleRegs:$src2),
49 (A2_addp DoubleRegs:$src1, DoubleRegs:$src2)>, Requires<[HasV5]>;
50 def: Pat<(int_hexagon_A2_addpsat DoubleRegs:$src1, DoubleRegs:$src2),
51 (A2_addpsat DoubleRegs:$src1, DoubleRegs:$src2)>, Requires<[HasV5]>;
54 def: Pat<(int_hexagon_A2_addsp IntRegs:$src1, DoubleRegs:$src2),
55 (A2_addsp IntRegs:$src1, DoubleRegs:$src2)>, Requires<[HasV5]>;
60 def: Pat<(int_hexagon_A2_andp DoubleRegs:$src1, DoubleRegs:$src2),
61 (A2_andp DoubleRegs:$src1, DoubleRegs:$src2)>, Requires<[HasV5]>;
[all …]
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| H A D | HexagonDepInstrInfo.td | 23 (outs DoubleRegs:$Rdd32),
24 (ins DoubleRegs:$Rss32),
229 (outs DoubleRegs:$Rdd32),
230 (ins DoubleRegs:$Rss32, DoubleRegs:$Rtt32),
240 (outs DoubleRegs:$Rdd32),
241 (ins DoubleRegs:$Rss32, DoubleRegs:$Rtt32),
267 (outs DoubleRegs:$Rdd32),
268 (ins IntRegs:$Rs32, DoubleRegs
[all...] |
| H A D | HexagonIntrinsics.td | 27 def: Pat<(int_hexagon_A2_addp DoubleRegs:$Rs, DoubleRegs:$Rt),
28 (A2_addp DoubleRegs:$Rs, DoubleRegs:$Rt)>;
34 def: Pat<(int_hexagon_A2_subp DoubleRegs:$Rs, DoubleRegs:$Rt),
35 (A2_subp DoubleRegs:$Rs, DoubleRegs:$Rt)>;
54 def: Pat<(int_hexagon_S2_asl_i_p DoubleRegs:$Rs, timm:$u6),
55 (S2_asl_i_p DoubleRegs:$Rs, imm:$u6)>;
56 def: Pat<(int_hexagon_S2_lsr_i_p DoubleRegs:$Rs, timm:$u6),
57 (S2_lsr_i_p DoubleRegs:$Rs, imm:$u6)>;
58 def: Pat<(int_hexagon_S2_asr_i_p DoubleRegs:$Rs, timm:$u6),
59 (S2_asr_i_p DoubleRegs:$Rs, imm:$u6)>;
[all …]
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| H A D | HexagonPseudo.td | 14 def I64 : PatLeaf<(i64 DoubleRegs:$R)>;
16 def F64 : PatLeaf<(f64 DoubleRegs:$R)>;
34 def TFRI64_V2_ext : InstHexagon<(outs DoubleRegs:$dst),
67 def CONST64 : CONSTLDInst<(outs DoubleRegs:$Rd), (ins i64imm:$v),
354 def PS_pselect: InstHexagon<(outs DoubleRegs:$Rd),
355 (ins PredRegs:$Pu, DoubleRegs:$Rs, DoubleRegs:$Rt),
525 def TFRI64_V4 : InstHexagon<(outs DoubleRegs:$dst),
535 def PS_vmulw : PseudoM<(outs DoubleRegs:$Rd),
536 (ins DoubleRegs:$Rs, DoubleRegs:$Rt), "", []>;
539 def PS_vmulw_acc : PseudoM<(outs DoubleRegs:$Rd),
[all …]
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| H A D | HexagonIntrinsicsV5.td | 177 def : Pat <(int_hexagon_S4_vrcrotate DoubleRegs:$src1, IntRegs:$src2,
179 (S4_vrcrotate DoubleRegs:$src1, IntRegs:$src2, u2_0ImmPred:$src3)>;
183 def : Pat <(int_hexagon_S4_vrcrotate_acc DoubleRegs:$src1, DoubleRegs:$src2,
185 (S4_vrcrotate_acc DoubleRegs:$src1, DoubleRegs:$src2,
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| H A D | HexagonDepMappings.td | 17 …stAlias<"$Rdd32 = vaddb($Rss32,$Rtt32)", (A2_vaddub DoubleRegs:$Rdd32, DoubleRegs:$Rss32, DoubleRe…
18 …stAlias<"$Rdd32 = vsubb($Rss32,$Rtt32)", (A2_vsubub DoubleRegs:$Rdd32, DoubleRegs:$Rss32, DoubleRe…
28 def L2_loadalignb_zomapAlias : InstAlias<"$Ryy32 = memb_fifo($Rs32)", (L2_loadalignb_io DoubleRegs:…
29 def L2_loadalignh_zomapAlias : InstAlias<"$Ryy32 = memh_fifo($Rs32)", (L2_loadalignh_io DoubleRegs:…
31 def L2_loadbsw4_zomapAlias : InstAlias<"$Rdd32 = membh($Rs32)", (L2_loadbsw4_io DoubleRegs:$Rdd32, …
33 def L2_loadbzw4_zomapAlias : InstAlias<"$Rdd32 = memubh($Rs32)", (L2_loadbzw4_io DoubleRegs:$Rdd32,…
35 def L2_loadrd_zomapAlias : InstAlias<"$Rdd32 = memd($Rs32)", (L2_loadrd_io DoubleRegs:$Rdd32, IntRe…
44 …apAlias : InstAlias<"if (!$Pt4) $Rdd32 = memd($Rs32)", (L2_ploadrdf_io DoubleRegs:$Rdd32, PredRegs…
45 … : InstAlias<"if (!$Pt4.new) $Rdd32 = memd($Rs32)", (L2_ploadrdfnew_io DoubleRegs:$Rdd32, PredRegs…
46 def L2_ploadrdt_zomapAlias : InstAlias<"if ($Pt4) $Rdd32 = memd($Rs32)", (L2_ploadrdt_io DoubleRegs…
[all …]
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| H A D | HexagonSplitDouble.cpp | 225 BitVector DoubleRegs(NumRegs); in partitionRegisters() local
229 DoubleRegs.set(i); in partitionRegisters()
233 for (int x = DoubleRegs.find_first(); x >= 0; x = DoubleRegs.find_next(x)) { in partitionRegisters()
244 for (int x = DoubleRegs.find_first(); x >= 0; x = DoubleRegs.find_next(x)) { in partitionRegisters()
282 for (int x = DoubleRegs.find_first(); x >= 0; x = DoubleRegs.find_next(x)) { in partitionRegisters()
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| H A D | HexagonPatterns.td | 86 def V8I8: PatLeaf<(v8i8 DoubleRegs:$R)>;
87 def V4I16: PatLeaf<(v4i16 DoubleRegs:$R)>;
88 def V2I32: PatLeaf<(v2i32 DoubleRegs:$R)>;
251 (REG_SEQUENCE DoubleRegs, (i32 (IMPLICIT_DEF)), isub_hi, (i32 $Rs), isub_lo)>;
254 (REG_SEQUENCE DoubleRegs, $Rs, isub_hi, $Rt, isub_lo)>;
481 defm: NopCast_pat<i64, v2i32, DoubleRegs>;
482 defm: NopCast_pat<i64, v4i16, DoubleRegs>;
483 defm: NopCast_pat<i64, v8i8, DoubleRegs>;
484 defm: NopCast_pat<v2i32, v4i16, DoubleRegs>;
485 defm: NopCast_pat<v2i32, v8i8, DoubleRegs>;
[all …]
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| H A D | HexagonRegisterInfo.td | 545 def DoubleRegs : RegisterClass<"Hexagon", [i64, f64, v8i8, v4i16, v2i32], 64,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 169 static const MCPhysReg DoubleRegs[32] = { variable
532 Op.Reg.RegNum = DoubleRegs[regIdx / 2]; in MorphToDoubleReg()
|