| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 1212 if (auto *Disjoint = dyn_cast<PossiblyDisjointInst>(Op0BO); in visitShl() local
1213 Disjoint && Disjoint->isDisjoint()) in visitShl()
1356 } else if (auto *Disjoint = dyn_cast<PossiblyDisjointInst>(Op0)) { in visitLShr() local
1358 Disjoint->isDisjoint()); in visitLShr()
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| H A D | InstCombineAndOrXor.cpp | 1872 auto *Disjoint = dyn_cast<PossiblyDisjointInst>(&I); in foldCastedBitwiseLogic() local
1874 if (Disjoint && NewDisjoint) in foldCastedBitwiseLogic()
1875 NewDisjoint->setIsDisjoint(Disjoint->isDisjoint()); in foldCastedBitwiseLogic()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/ |
| H A D | ScalarEvolutionExpander.h | 49 unsigned Disjoint : 1; member
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MIPatternMatch.h | 592 MachineInstr::Disjoint>
595 MachineInstr::Disjoint>(L, R);
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| H A D | GenericMachineInstrs.h | 30 IsExact | Disjoint | NonNeg |
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 401 Disjoint = 1 << 3,
425 PoisonGeneratingFlags = NoUnsignedWrap | NoSignedWrap | Exact | Disjoint |
449 void setDisjoint(bool b) { setFlag<Disjoint>(b); }
466 bool hasDisjoint() const { return Flags & Disjoint; }
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| H A D | MachineInstr.h | 122 Disjoint = 1 << 19, // Each bit is zero in at least one of the inputs. enumerator
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| H A D | SDPatternMatch.h | 787 return BinaryOpc_match<LHS, RHS, true>(ISD::OR, L, R, SDNodeFlags::Disjoint);
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | ScalarEvolutionExpander.cpp | 50 Disjoint = false; in PoisonFlags()
61 Disjoint = PDI->isDisjoint(); in PoisonFlags()
82 PDI->setIsDisjoint(Disjoint); in apply()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MIRPrinter.cpp | 811 if (MI.getFlag(MachineInstr::Disjoint)) in printMI()
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| H A D | MachineInstr.cpp | 598 MIFlags |= MachineInstr::MIFlag::Disjoint; in copyFlagsFromInstruction()
1861 if (getFlag(MachineInstr::Disjoint)) in print()
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| H A D | MachinePipeliner.cpp | 2947 bool Disjoint = TII->areMemAccessesTriviallyDisjoint(*NewMI, *PrevDef); in canUseLastOffsetValue() local
2949 if (!Disjoint) in canUseLastOffsetValue()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 1794 Mask, EVL, SDNodeFlags::Disjoint); in ExpandVP_FCOPYSIGN()
1998 SDNodeFlags::Disjoint); in ExpandFCOPYSIGN()
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| H A D | InstrEmitter.cpp | 1109 MI->setFlag(MachineInstr::MIFlag::Disjoint); in EmitMachineNode()
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| H A D | TargetLowering.cpp | 633 SDNodeFlags Flags(Op->getFlags().hasDisjoint() ? SDNodeFlags::Disjoint in ShrinkDemandedOp()
1546 Op->dropFlags(SDNodeFlags::Disjoint); in SimplifyDemandedBits()
1552 Op->dropFlags(SDNodeFlags::Disjoint); in SimplifyDemandedBits()
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| H A D | LegalizeDAG.cpp | 1753 SDNodeFlags::Disjoint); in ExpandFCOPYSIGN()
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| H A D | DAGCombiner.cpp | 3135 return DAG.getNode(ISD::OR, DL, VT, N0, N1, SDNodeFlags::Disjoint); in visitADD()
9894 return DAG.getNode(ISD::OR, DL, VT, N0, N1, SDNodeFlags::Disjoint); in visitXOR()
10547 Flags |= SDNodeFlags::Disjoint; in visitSHL()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | InstrTypes.h | 355 DEFINE_HELPERS(Or, Disjoint) // CreateDisjointOr
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 1516 Flags |= MachineInstr::Disjoint; in parseInstruction()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 1160 return MI.getFlag(MachineInstr::Disjoint);
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| /freebsd/contrib/llvm-project/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 7238 bool Disjoint = EatIfPresent(lltok::kw_disjoint); in parseInstruction() local
7241 if (Disjoint) in parseInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 7362 MIRBuilder.buildOr(Dst, ShX, ShY, MachineInstr::Disjoint); in lowerFunnelShiftAsShifts()
8241 Flags |= MachineInstr::Disjoint; in lowerFCopySign()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 7813 DAG.getNode(ISD::OR, SL, IntVT, LHS, RHS, SDNodeFlags::Disjoint); in lowerINSERT_VECTOR_ELT()
8096 DAG.getNode(ISD::OR, SL, MVT::i32, Lo, ShlHi, SDNodeFlags::Disjoint); in lowerBUILD_VECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4237 SDNodeFlags::Disjoint); in lowerBuildVectorViaPacking()
6945 SDNodeFlags::Disjoint); in lowerFCOPYSIGN()
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