Home
last modified time | relevance | path

Searched refs:Dest0 (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCExpandAtomicPseudoInsts.cpp50 Register Dest0, Register Dest1, Register Src0, in PairedCopy() argument
54 if (Dest0 == Src1 && Dest1 == Src0) { in PairedCopy()
56 BuildMI(MBB, MBBI, DL, XOR, Dest0).addReg(Dest0).addReg(Dest1); in PairedCopy()
57 BuildMI(MBB, MBBI, DL, XOR, Dest1).addReg(Dest0).addReg(Dest1); in PairedCopy()
58 BuildMI(MBB, MBBI, DL, XOR, Dest0).addReg(Dest0).addReg(Dest1); in PairedCopy()
59 } else if (Dest0 != Src0 || Dest1 != Src1) { in PairedCopy()
60 if (Dest0 == Src1 || Dest1 != Src0) { in PairedCopy()
62 BuildMI(MBB, MBBI, DL, OR, Dest0).addReg(Src0).addReg(Src0); in PairedCopy()
64 BuildMI(MBB, MBBI, DL, OR, Dest0).addReg(Src0).addReg(Src0); in PairedCopy()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp1267 auto *Dest0 = TII->getNamedOperand(*CI.I, OpName); in copyToDestRegs() local
1273 Dest0->setIsEarlyClobber(false); in copyToDestRegs()
1277 .add(*Dest0) // Copy to same destination including flags and sub reg. in copyToDestRegs()
H A DSIInstrInfo.cpp7589 MachineOperand &Dest0 = Inst.getOperand(0); in moveToVALUImpl() local
7598 RI.getEquivalentVGPRClass(MRI.getRegClass(Dest0.getReg())); in moveToVALUImpl()
7607 MRI.replaceRegWith(Dest0.getReg(), DestReg); in moveToVALUImpl()
H A DSIISelLowering.cpp5306 MachineOperand &Dest0 = MI.getOperand(0); in EmitInstrWithCustomInserter() local
5315 BuildMI(*BB, MI, DL, TII->get(Opc), Dest0.getReg()) in EmitInstrWithCustomInserter()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp704 llvm::Value *Dest0 = CGF.EmitScalarExpr(E->getArg(1)); in emitSincosBuiltin() local
714 LValue SinLV = CGF.MakeNaturalAlignAddrLValue(Dest0, DestPtrType); in emitSincosBuiltin()