Searched refs:DepCtr (Results 1 – 12 of 12) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUWaitSGPRHazards.cpp | 169 Mask = AMDGPU::DepCtr::encodeFieldSaSdst( in mergeMasks() 170 Mask, std::min(AMDGPU::DepCtr::decodeFieldSaSdst(Mask1), in mergeMasks() 171 AMDGPU::DepCtr::decodeFieldSaSdst(Mask2))); in mergeMasks() 172 Mask = AMDGPU::DepCtr::encodeFieldVaVcc( in mergeMasks() 173 Mask, std::min(AMDGPU::DepCtr::decodeFieldVaVcc(Mask1), in mergeMasks() 174 AMDGPU::DepCtr::decodeFieldVaVcc(Mask2))); in mergeMasks() 175 Mask = AMDGPU::DepCtr::encodeFieldVmVsrc( in mergeMasks() 176 Mask, std::min(AMDGPU::DepCtr::decodeFieldVmVsrc(Mask1), in mergeMasks() 177 AMDGPU::DepCtr::decodeFieldVmVsrc(Mask2))); in mergeMasks() 178 Mask = AMDGPU::DepCtr::encodeFieldVaSdst( in mergeMasks() [all …]
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| H A D | GCNHazardRecognizer.cpp | 1271 AMDGPU::DepCtr::decodeFieldVmVsrc(MI.getOperand(0).getImm()) == 0); in fixVMEMtoScalarWriteHazards() 1281 .addImm(AMDGPU::DepCtr::encodeFieldVmVsrc(0)); in fixVMEMtoScalarWriteHazards() 1400 AMDGPU::DepCtr::decodeFieldSaSdst(MI.getOperand(0).getImm()) == 0) in fixVcmpxExecWARHazard() 1411 .addImm(AMDGPU::DepCtr::encodeFieldSaSdst(0)); in fixVcmpxExecWARHazard() 1563 AMDGPU::DepCtr::decodeFieldVmVsrc(I.getOperand(0).getImm()) == 0) || in fixLdsDirectVMEMHazard() 1577 .addImm(AMDGPU::DepCtr::encodeFieldVmVsrc(0)); in fixLdsDirectVMEMHazard() 1640 AMDGPU::DepCtr::decodeFieldVaVdst(I.getOperand(0).getImm()) == 0)) in fixVALUPartialForwardingHazard() 1807 .addImm(AMDGPU::DepCtr::encodeFieldVaVdst(0)); in fixVALUTransUseHazard() 3036 AMDGPU::DepCtr::decodeFieldSaSdst(I.getOperand(0).getImm()) == 0) in fixVALUMaskWriteHazard() 3086 .addImm(AMDGPU::DepCtr::encodeFieldSaSdst(0)); in fixVALUMaskWriteHazard()
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| H A D | AMDGPUInsertDelayAlu.cpp | 45 AMDGPU::DepCtr::decodeFieldVaVdst(MI.getOperand(0).getImm()) == 0) in instructionWaitsForVALU()
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| H A D | SOPInstructions.td | 1710 SOPP_Pseudo <"s_waitcnt_depctr" , (ins DepCtr:$simm16), "$simm16">;
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| H A D | SIInstrInfo.td | 1054 def DepCtr : CustomOperand<i32>;
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| H A D | SIInstrInfo.cpp | 2969 .addImm(AMDGPU::DepCtr::encodeFieldSaSdst(0)); in insertIndirectBranch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUAsmUtils.h | 56 namespace DepCtr {
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| H A D | AMDGPUAsmUtils.cpp | 68 namespace DepCtr { namespace
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| H A D | AMDGPUBaseInfo.h | 1237 namespace DepCtr {
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| H A D | AMDGPUBaseInfo.cpp | 1880 namespace DepCtr { namespace
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 7706 bool AMDGPUAsmParser::parseDepCtr(int64_t &DepCtr, unsigned &UsedOprMask) { in parseDepCtr() argument 7708 using namespace llvm::AMDGPU::DepCtr; in parseDepCtr() 7740 DepCtr = (DepCtr & ~CntValMask) | CntVal; in parseDepCtr() 7745 using namespace llvm::AMDGPU::DepCtr; in parseDepCtr() 7747 int64_t DepCtr = getDefaultDepCtrEncoding(getSTI()); in parseDepCtr() local 7753 if (!parseDepCtr(DepCtr, UsedOprMask)) in parseDepCtr() 7757 if (!parseExpr(DepCtr)) in parseDepCtr() 7761 Operands.push_back(AMDGPUOperand::CreateImm(this, DepCtr, Loc)); in parseDepCtr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 1626 using namespace llvm::AMDGPU::DepCtr; in printDepCtr()
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