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Searched refs:DemandedSrc (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1315 SDValue DemandedSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local
1317 if (DemandedSrc) { in SimplifyDemandedBits()
1318 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedSrc, in SimplifyDemandedBits()
2666 if (SDValue DemandedSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local
2669 TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedSrc, Idx); in SimplifyDemandedBits()
2765 if (SDValue DemandedSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local
2767 SDValue NewOp = TLO.DAG.getBitcast(VT, DemandedSrc); in SimplifyDemandedBits()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp37646 APInt DemandedSrc = DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements()); in ComputeNumSignBitsForTargetNode() local
37647 unsigned Tmp = DAG.ComputeNumSignBits(Src, DemandedSrc, Depth + 1); in ComputeNumSignBitsForTargetNode()
42075 APInt DemandedSrc = DemandedElts.lshr(ShiftAmt); in SimplifyDemandedVectorEltsForTargetNode() local
42076 if (SimplifyDemandedVectorElts(Src, DemandedSrc, KnownUndef, KnownZero, TLO, in SimplifyDemandedVectorEltsForTargetNode()
42114 APInt DemandedSrc = DemandedElts.shl(ShiftAmt); in SimplifyDemandedVectorEltsForTargetNode() local
42115 if (SimplifyDemandedVectorElts(Src, DemandedSrc, KnownUndef, KnownZero, TLO, in SimplifyDemandedVectorEltsForTargetNode()
42275 APInt DemandedSrc = DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements()); in SimplifyDemandedVectorEltsForTargetNode() local
42277 if (SimplifyDemandedVectorElts(Src, DemandedSrc, SrcUndef, SrcZero, TLO, in SimplifyDemandedVectorEltsForTargetNode()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp14646 if (SDValue DemandedSrc = in performCvtF32UByteNCombine() local
14648 return DAG.getNode(N->getOpcode(), SL, MVT::f32, DemandedSrc); in performCvtF32UByteNCombine()