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Searched refs:DemandedLHS (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DGISelValueTracking.cpp651 APInt DemandedLHS, DemandedRHS; in computeKnownBitsImpl() local
656 DemandedElts, DemandedLHS, DemandedRHS)) in computeKnownBitsImpl()
662 if (!!DemandedLHS) { in computeKnownBitsImpl()
663 computeKnownBitsImpl(MI.getOperand(1).getReg(), Known2, DemandedLHS, in computeKnownBitsImpl()
1658 APInt DemandedLHS, DemandedRHS; in computeKnownFPClass() local
1661 DemandedLHS = DemandedRHS = DemandedElts; in computeKnownFPClass()
1664 DemandedElts, DemandedLHS, in computeKnownFPClass()
1671 if (!!DemandedLHS) { in computeKnownFPClass()
1673 computeKnownFPClass(LHS, DemandedLHS, InterestedClasses, Known, in computeKnownFPClass()
1989 APInt DemandedLHS, DemandedRHS; in computeNumSignBits() local
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DVectorUtils.cpp460 const APInt &DemandedElts, APInt &DemandedLHS, in getShuffleDemandedElts() argument
462 DemandedLHS = DemandedRHS = APInt::getZero(SrcWidth); in getShuffleDemandedElts()
470 DemandedLHS.setBit(0); in getShuffleDemandedElts()
488 DemandedLHS.setBit(M); in getShuffleDemandedElts()
789 APInt &DemandedLHS, in getHorizDemandedEltsForFirstOperand() argument
797 DemandedLHS = APInt::getZero(NumElts); in getHorizDemandedEltsForFirstOperand()
807 DemandedLHS.setBit(LaneIdx + 2 * LocalIdx); in getHorizDemandedEltsForFirstOperand()
H A DValueTracking.cpp121 APInt &DemandedLHS, APInt &DemandedRHS) { in getShuffleDemandedElts() argument
124 DemandedLHS = DemandedRHS = DemandedElts; in getShuffleDemandedElts()
131 DemandedElts, DemandedLHS, DemandedRHS); in getShuffleDemandedElts()
2052 APInt DemandedLHS, DemandedRHS; in computeKnownBitsFromOperator() local
2053 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) { in computeKnownBitsFromOperator()
2059 if (!!DemandedLHS) { in computeKnownBitsFromOperator()
2061 computeKnownBits(LHS, DemandedLHS, Known, Q, Depth + 1); in computeKnownBitsFromOperator()
3240 APInt DemandedLHS, DemandedRHS; in isKnownNonZeroFromOperator() local
3243 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) in isKnownNonZeroFromOperator()
3248 (DemandedLHS.isZero() || in isKnownNonZeroFromOperator()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DVectorUtils.h220 APInt &DemandedLHS, APInt &DemandedRHS,
317 APInt &DemandedLHS,
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp1740 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
1747 DemandedLHS.clearBit(i); in SimplifyDemandedVectorElts()
1753 simplifyAndSetOp(I, 1, DemandedLHS, PoisonElts2); in SimplifyDemandedVectorElts()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp3069 APInt DemandedLHS = APInt::getZero(NumElts); in isSplatValue() local
3081 DemandedLHS.setBit(M); in isSplatValue()
3088 if ((DemandedLHS.isZero() && DemandedRHS.isZero()) || in isSplatValue()
3089 (!DemandedLHS.isZero() && !DemandedRHS.isZero())) in isSplatValue()
3101 if (!DemandedLHS.isZero()) in isSplatValue()
3102 return CheckSplatSrc(V.getOperand(0), DemandedLHS); in isSplatValue()
3494 APInt DemandedLHS, DemandedRHS; in computeKnownBits() local
3498 DemandedLHS, DemandedRHS)) in computeKnownBits()
3503 if (!!DemandedLHS) { in computeKnownBits()
3505 Known2 = computeKnownBits(LHS, DemandedLHS, Depth + 1); in computeKnownBits()
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H A DTargetLowering.cpp1405 APInt DemandedLHS, DemandedRHS; in SimplifyDemandedBits() local
1406 if (!getShuffleDemandedElts(NumElts, ShuffleMask, DemandedElts, DemandedLHS, in SimplifyDemandedBits()
1410 if (!!DemandedLHS || !!DemandedRHS) { in SimplifyDemandedBits()
1416 if (!!DemandedLHS) { in SimplifyDemandedBits()
1417 if (SimplifyDemandedBits(Op0, DemandedBits, DemandedLHS, Known2, TLO, in SimplifyDemandedBits()
1431 Op0, DemandedBits, DemandedLHS, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
3564 APInt DemandedLHS(DemandedElts); in SimplifyDemandedVectorElts() local
3568 if (SimplifyDemandedVectorElts(LHS, DemandedLHS, UndefLHS, ZeroLHS, TLO, in SimplifyDemandedVectorElts()
3594 APInt DemandedLHS(NumElts, 0); in SimplifyDemandedVectorElts() local
3602 DemandedLHS.setBit(M); in SimplifyDemandedVectorElts()
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H A DDAGCombiner.cpp27111 APInt DemandedLHS = APInt::getZero(NumElts); in visitVECTOR_SHUFFLE() local
27120 APInt &Demanded = M < (int)NumElts ? DemandedLHS : DemandedRHS; in visitVECTOR_SHUFFLE()
27125 if (!IsInLaneMask && (!DemandedLHS.isZero() || !DemandedRHS.isZero()) && in visitVECTOR_SHUFFLE()
27126 (DemandedLHS.isZero() || DAG.MaskedVectorIsZero(N0, DemandedLHS)) && in visitVECTOR_SHUFFLE()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp3800 SDValue DemandedLHS = TLI.SimplifyMultipleUseDemandedBits(LHS, Demanded, DAG); in simplifyMul24() local
3802 if (DemandedLHS || DemandedRHS) in simplifyMul24()
3804 DemandedLHS ? DemandedLHS : LHS, in simplifyMul24()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp5482 APInt &DemandedLHS, APInt &DemandedRHS) { in getPackDemandedElts() argument
5489 DemandedLHS = APInt::getZero(NumInnerElts); in getPackDemandedElts()
5498 DemandedLHS.setBit(InnerIdx); in getPackDemandedElts()
5507 APInt &DemandedLHS, APInt &DemandedRHS) { in getHorizDemandedElts() argument
5509 DemandedLHS, DemandedRHS); in getHorizDemandedElts()
5510 DemandedLHS |= DemandedLHS << 1; in getHorizDemandedElts()
38686 APInt DemandedLHS, DemandedRHS; in computeKnownBitsForTargetNode() local
38687 getPackDemandedElts(VT, DemandedElts, DemandedLHS, DemandedRHS); in computeKnownBitsForTargetNode()
38693 if (!!DemandedLHS) { in computeKnownBitsForTargetNode()
38694 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedLHS, Depth + 1); in computeKnownBitsForTargetNode()
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