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Searched refs:DefSubReg (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DPeepholeOptimizer.cpp459 bool findNextSource(const TargetRegisterClass *DefRC, unsigned DefSubReg,
694 unsigned DefSubReg; member in __anon776574090111::ValueTracker
739 ValueTracker(Register Reg, unsigned DefSubReg, const MachineRegisterInfo &MRI, in ValueTracker() argument
741 : DefSubReg(DefSubReg), Reg(Reg), MRI(MRI), TII(TII) { in ValueTracker()
999 unsigned DefSubReg, in findNextSource() argument
1070 if (!TRI->shouldRewriteCopySrc(DefRC, DefSubReg, SrcRC, in findNextSource()
1977 if (RegSeqInput.SubIdx == DefSubReg) in getNextSourceFromRegSequence()
1986 LaneBitmask DefMask = TRI->getSubRegIndexLaneMask(DefSubReg); in getNextSourceFromRegSequence()
1997 TRI->reverseComposeSubRegIndices(RegSeqInput.SubIdx, DefSubReg); in getNextSourceFromRegSequence()
2040 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
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H A DTargetRegisterInfo.cpp419 unsigned DefSubReg, in shareSameRegisterFile() argument
426 if (DefRC == SrcRC && DefSubReg == SrcSubReg) in shareSameRegisterFile()
431 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
432 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
439 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
452 unsigned DefSubReg, in shouldRewriteCopySrc() argument
456 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp44 unsigned DefSubReg = AMDGPU::NoSubRegister; member
51 unsigned DefSubReg = AMDGPU::NoSubRegister) in FoldableDef()
52 : DefRC(DefRC), DefSubReg(DefSubReg), Kind(FoldOp.getType()) { in FoldableDef()
67 unsigned DefSubReg = AMDGPU::NoSubRegister) in FoldableDef()
68 : ImmToFold(FoldImm), DefRC(DefRC), DefSubReg(DefSubReg), in FoldableDef()
74 Copy.DefSubReg = TRI.composeSubRegIndices(DefSubReg, SubReg); in getWithSubReg()
108 return SIInstrInfo::extractSubregFromImm(ImmToFold, DefSubReg); in getEffectiveImmVal()
127 if (DefSubReg != AMDGPU::NoSubRegister) in isOperandLegal()
135 if (DefSubReg != AMDGPU::NoSubRegister) in isOperandLegal()
1124 OpToFold.DefSubReg); in tryToFoldACImm()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h163 unsigned DefSubReg,
H A DARMBaseRegisterInfo.cpp966 unsigned DefSubReg, in shouldRewriteCopySrc() argument
970 if (DefRC == &ARM::SPRRegClass && DefSubReg == 0 && in shouldRewriteCopySrc()
975 return TargetRegisterInfo::shouldRewriteCopySrc(DefRC, DefSubReg, in shouldRewriteCopySrc()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h685 unsigned DefSubReg,