Searched refs:DefSU (Results 1 – 3 of 3) sorted by relevance
314 SUnit *DefSU = I->SU; in addPhysRegDeps() local315 if (DefSU == &ExitSU) in addPhysRegDeps()317 MachineInstr *DefInstr = DefSU->getInstr(); in addPhysRegDeps()319 if (DefSU != SU && in addPhysRegDeps()326 ST.adjustSchedDependency(SU, OperIdx, DefSU, I->OpIdx, Dep, in addPhysRegDeps()328 DefSU->addPred(Dep); in addPhysRegDeps()490 SUnit *DefSU = V2SU.SU; in addVRegDefDeps() local496 if (DefSU == SU) in addVRegDefDeps()500 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()501 DefSU->addPred(Dep); in addVRegDefDeps()[all …]
1033 SUnit *DefSU = getSUnit(DefMI); in changeDependences() local1034 if (!DefSU) in changeDependences()1050 if (P.getSUnit() == DefSU) in changeDependences()3083 SUnit *DefSU = Insts.at(MoveDef); in orderDependence() local3093 orderDependence(SSD, DefSU, Insts); in orderDependence()3110 SUnit *DefSU = SSD->getSUnit(&Phi); in isLoopCarried() local3111 unsigned DefCycle = cycleScheduled(DefSU); in isLoopCarried()3112 int DefStage = stageScheduled(DefSU); in isLoopCarried()
1597 const SUnit *DefSU = getSUnit(DefMI); in computeCyclicCriticalPath() local1598 if (!DefSU) in computeCyclicCriticalPath()1601 unsigned LiveOutHeight = DefSU->getHeight(); in computeCyclicCriticalPath()1602 unsigned LiveOutDepth = DefSU->getDepth() + DefSU->Latency; in computeCyclicCriticalPath()1622 unsigned LiveInHeight = SU->getHeight() + DefSU->Latency; in computeCyclicCriticalPath()1629 LLVM_DEBUG(dbgs() << "Cyclic Path: SU(" << DefSU->NodeNum << ") -> SU(" in computeCyclicCriticalPath()