Home
last modified time | relevance | path

Searched refs:DataReg (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILowerControlFlow.cpp496 Register DataReg = MI.getOperand(0).getReg(); in emitEndCf() local
499 if (I->modifiesRegister(DataReg, TRI)) { in emitEndCf()
526 LV->replaceKillInstruction(DataReg, MI, *NewMI); in emitEndCf()
H A DSIInstrInfo.cpp10404 Register DataReg = Op.getReg(); in enforceOperandRCAlignment() local
10405 bool IsAGPR = RI.isAGPR(MRI, DataReg); in enforceOperandRCAlignment()
10413 .addReg(DataReg, 0, Op.getSubReg()) in enforceOperandRCAlignment()
H A DAMDGPULegalizerInfo.cpp3217 Register DataReg = MI.getOperand(0).getReg(); in legalizeStore() local
3218 LLT DataTy = MRI.getType(DataReg); in legalizeStore()
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DCallEvent.cpp890 const MemRegion *DataReg = getSVal(Callee).getAsRegion(); in getBlockRegion() local
892 return dyn_cast_or_null<BlockDataRegion>(DataReg); in getBlockRegion()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVInstructionSelector.cpp3417 Register DataReg = I.getOperand(3).getReg(); in selectImageWriteIntrinsic() local
3418 assert(GR.getResultType(DataReg)->getOpcode() == SPIRV::OpTypeVector); in selectImageWriteIntrinsic()
3419 assert(GR.getScalarOrVectorComponentCount(GR.getResultType(DataReg)) == 4); in selectImageWriteIntrinsic()
3424 .addUse(DataReg) in selectImageWriteIntrinsic()