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/freebsd/sys/contrib/device-tree/Bindings/display/
H A Dmipi-dsi-bus.txt1 MIPI DSI (Display Serial Interface) busses
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
15 The following assumes that only a single peripheral is connected to a DSI
18 DSI host
22 a DSI host, the following properties apply to a node representing a DSI host.
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
34 conjunction with another DSI host to drive the same peripheral. Hardware
[all …]
H A Dtruly,nt35597.txt1 Truly model NT35597 DSI display driver
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
23 - port@0: DSI input port driven by master DSI
24 - port@1: DSI input port driven by secondary DSI
H A Dste,mcde.txt4 and displaying several channels memory resident graphics data on DSI or
24 - #address-cells: should be <1> (for the DSI hosts that will be children)
25 - #size-cells: should be <1> (for the DSI hosts that will be children)
30 The devicetree must specify subnodes for the DSI host adapters.
35 - reg: must specify the register range for the DSI host
45 Display panels and bridges will appear as children on the DSI hosts, and
46 the displays are connected to the DSI hosts using the common binding
50 If a DSI host is unused (not connected) it will have no children defined.
98 /* This DSI port only has the Low Power / Energy Save clock */
H A Dbrcm,bcm-vc4.txt65 Required properties for DSI:
67 - reg: Physical base address and length of the DSI block's registers
70 - clocks: a) phy: The DSI PLL clock feeding the DSI analog PHY
71 b) escape: The DSI ESC clock from CPRMAN
72 c) pixel: The DSI pixel clock from CPRMAN
74 The 3 clocks output from the DSI analog PHY: dsi[01]_byte,
/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dsharp,lq101r1sx01.txt3 This panel requires a dual-channel DSI host to operate. It supports two modes:
7 Each of the DSI channels controls a separate DSI peripheral. The peripheral
8 driven by the first link (DSI-LINK1), left or even, is considered the primary
10 to the peripheral driven by the second link (DSI-LINK2, right or odd).
12 Note that in video mode the DSI-LINK1 interface always provides the left/even
13 pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
20 - reg: DSI virtual channel of the peripheral
22 Required properties (for DSI-LINK1 only):
23 - link2: phandle to the DSI peripheral on the secondary link. Note that the
24 presence of this property marks the containing node as DSI-LINK1.
[all …]
H A Dpanel-dsi-cm.txt1 Generic MIPI DSI Command Mode Panel
13 - Video port for DSI input
H A Dinnolux,p079zca.txt5 - reg: DSI virtual channel of the peripheral
H A Drocktech,jh057n00900.txt5 - reg: DSI virtual channel of the peripheral
/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dcdns,dsi.txt1 Cadence DSI bridge
4 The Cadence DSI bridge is a DPI to DSI bridge supporting up to 4 DSI lanes.
9 - interrupts: interrupt line connected to the DSI bridge.
10 - clocks: DSI bridge clocks.
18 - resets: DSI reset lines.
24 * port 0: this port is only needed if some of your DSI devices are
27 DSI virtual channel used by this device.
31 - one subnode per DSI device connected on the DSI bus. Each DSI device should
H A Dtoshiba,tc358764.txt1 TC358764 MIPI-DSI to LVDS panel bridge
5 - reg: the virtual channel number of a DSI peripheral
13 0: DSI Input, not required, if the bridge is DSI controlled
H A Dadi,adv7511.txt6 conversion, S/PDIF, CEC and HDCP. ADV7533/5 supports the DSI interface for input
58 - adi,dsi-lanes: Number of DSI data lanes connected to the DSI host. It should
77 DSI data lanes, rather than generate its own timings for HDMI output.
89 - Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533/5, the
H A Dtoshiba,tc358767.txt17 to a DPI/DSI source and to an eDP/DP sink according to [1][2]:
18 - port@0: DSI input port
H A Dti,sn65dsi86.txt1 SN65DSI86 DSI to eDP bridge chip
40 - Video port 0 for DSI input
/freebsd/sys/contrib/device-tree/Bindings/display/exynos/
H A Dexynos_dsim.txt1 Exynos MIPI DSI Master
11 - interrupts: should contain DSI interrupt
23 according to DSI host bindings (see MIPI DSI bindings [1])
24 - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst
26 - samsung,esc-clock-frequency: specifies DSI frequency in escape mode
32 Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
37 1: DSI output
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Ddsi.txt1 Qualcomm Technologies Inc. adreno/snapdragon DSI output
3 DSI Controller:
10 - interrupts: The interrupt signal from the DSI block.
27 by a DSI PHY block. See [1] for details on clock bindings.
31 - phys: phandle to DSI PHY device node
34 - ports: Contains 2 DSI controller ports as child nodes. Each port contains
38 - panel@0: Node of panel connected to this DSI controller.
40 - qcom,dual-dsi-mode: Boolean value indicating if the DSI controller is
41 driving a panel which needs 2 DSI links.
42 - qcom,master-dsi: Boolean value indicating if the DSI controller is driving
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/ti/
H A Dti,omap5-dss.txt21 - DSS Submodules: RFBI, DSI, HDMI
59 DSI
66 - interrupts: the DSI interrupt line
68 - vdd-supply: power supply for DSI
73 - Video port for DSI output
74 - DSI controlled peripherals
76 DSI Endpoint required properties:
77 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
H A Dti,omap4-dss.txt21 - DSS Submodules: RFBI, VENC, DSI, HDMI
78 DSI
85 - interrupts: the DSI interrupt line
87 - vdd-supply: power supply for DSI
92 - Video port for DSI output
93 - DSI controlled peripherals
95 DSI Endpoint required properties:
96 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
H A Dti,omap3-dss.txt72 DSI
79 - interrupts: the DSI interrupt line
81 - vdd-supply: power supply for DSI
85 DSI Endpoint required properties:
86 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,dsi.txt1 Mediatek DSI Device
4 The Mediatek DSI function block is a sink of the display subsystem and can
5 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
20 to the input port of an attached DSI panel or DSI-to-eDP encoder chip.
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmixel,mipi-dsi-phy.txt1 Mixel DSI PHY for i.MX8
3 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
4 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
5 electrical signals for DSI.
/freebsd/sys/contrib/device-tree/Bindings/display/hisilicon/
H A Ddw-dsi.txt1 Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
3 A DSI Host Controller resides in the middle of display controller and external
11 - ports: contains DSI controller input and output sub port.
H A Dhisi-ade.txt5 timing stream and transfer to DSI.
28 remote-endpoint set to the phandle of the connected DSI input endpoint.
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32f469.dtsi11 resets = <&rcc STM32F4_APB2_RESET(DSI)>;
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-g12b-a311d-bananapi-m2s.dts28 /* Display (DSI) bus */
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp641 MachineBasicBlock::instr_iterator DSI = I.getInstrIterator(); in runOnMachineBasicBlock() local
643 if (InMicroMipsMode && TII->getInstSizeInBytes(*std::next(DSI)) == 2 && in runOnMachineBasicBlock()
644 DSI->isCall()) { in runOnMachineBasicBlock()
653 DSI->setDesc(TII->get(getEquivalentCallShort(DSI->getOpcode()))); in runOnMachineBasicBlock()

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