Searched refs:DPair (Results 1 – 3 of 3) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 528 def DPair : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], 532 let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16)), 533 (add (trunc QPR, 8), (trunc DPair, 16))];
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H A D | ARMInstrNEON.td | 137 def VecListDPair : RegisterOperand<DPair, "printVectorListTwo"> { 164 def VecListDPairSpaced : RegisterOperand<DPair, "printVectorListTwoSpaced"> { 201 def VecListDPairAllLanes : RegisterOperand<DPair, 544 : PseudoVFPLdStM<(outs DPair:$dst), (ins GPR:$Rn), 546 [(set DPair:$dst, (v2f64 (word_alignedload GPR:$Rn)))]>; 551 : PseudoVFPLdStM<(outs), (ins DPair:$src, GPR:$Rn), 553 [(word_alignedstore (v2f64 DPair:$src), GPR:$Rn)]>; 7239 (v8i8 (VTBL2 (REG_SEQUENCE DPair, v8i8:$Vn0, dsub_0, 7245 (REG_SEQUENCE DPair, v8i8:$Vn0, dsub_0,
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 2498 void setVecListDPair(unsigned int DPair) { in setVecListDPair() argument 2500 VectorList.RegNum = DPair; in setVecListDPair() 3396 auto DPair = Parser->getDRegFromQReg(Reg.RegNum); in addVecListOperands() local 3397 DPair = Parser->getMRI()->getMatchingSuperReg( in addVecListOperands() 3398 DPair, ARM::dsub_0, &ARMMCRegisterClasses[ARM::DPairRegClassID]); in addVecListOperands() 3399 Inst.addOperand(MCOperand::createReg(DPair)); in addVecListOperands()
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