Searched refs:DFLL_BASE (Results 1 – 2 of 2) sorted by relevance
194 #define DFLL_BASE 0x2f4 macro
912 CLKDEV_MODIFY_4(sc->dev, DFLL_BASE, DFLL_BASE_DVFS_DFLL_RESET, in tegra210_hwreset_by_idx()914 CLKDEV_READ_4(sc->dev, DFLL_BASE, ®); in tegra210_hwreset_by_idx()