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Searched refs:D15 (Results 1 – 25 of 64) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrCrypto.td73 D12, D13, D14, D15, D16, D17, D18, D19, D20, D21, D22, D23],
81 D8, D9, D10, D11, D12, D13, D14, D15,
88 D8, D9, D10, D11, D12, D13, D14, D15,
H A DSparcRegisterInfo.td225 def D15 : Rd<30, "f30", [F30, F31]>, DwarfRegNum<[87]>;
288 def Q7 : Rq<28, "f28", [D14, D15]>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp288 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
296 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
304 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
312 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
320 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
328 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
336 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
344 if (MI.getOperand(0).getReg() == Hexagon::D15 && in remapInstruction()
691 Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15}; in DecodeDoubleRegsRegisterClass()
/freebsd/lib/msun/ld128/
H A Ds_expl.c194 D15 = 7.6478532249581686e-13, /* 0x1.ae892e3D16fcep-41 */ variable
252 dx * (D14 + dx * (D15 + dx * (D16 + in expm1l()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h146 case AArch64::D15: return AArch64::B15; in getBRegFromDReg()
185 case AArch64::B15: return AArch64::D15; in getDRegFromBReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp240 if (Reg < Hexagon::D0 || Reg > Hexagon::D15) in getMax32BitSubRegister()
790 .addDef(Hexagon::D15) in insertEpilogueInBlock()
840 .addDef(Hexagon::D15) in insertEpilogueInBlock()
846 .addDef(Hexagon::D15) in insertEpilogueInBlock()
867 .addDef(Hexagon::D15) in insertEpilogueInBlock()
1105 if (Reg < Hexagon::D0 || Reg > Hexagon::D15) { in insertCFIInstructionsAt()
H A DHexagonDepMappings.td85 def L4_return_map_to_raw_fAlias : InstAlias<"if (!$Pv4) dealloc_return", (L4_return_f D15, PredRegs…
86 …tAlias : InstAlias<"if (!$Pv4.new) dealloc_return:nt", (L4_return_fnew_pnt D15, PredRegs:$Pv4, R30…
87 …_ptAlias : InstAlias<"if (!$Pv4.new) dealloc_return:t", (L4_return_fnew_pt D15, PredRegs:$Pv4, R30…
88 def L4_return_map_to_raw_tAlias : InstAlias<"if ($Pv4) dealloc_return", (L4_return_t D15, PredRegs:…
89 …ntAlias : InstAlias<"if ($Pv4.new) dealloc_return:nt", (L4_return_tnew_pnt D15, PredRegs:$Pv4, R30…
90 …w_ptAlias : InstAlias<"if ($Pv4.new) dealloc_return:t", (L4_return_tnew_pt D15, PredRegs:$Pv4, R30…
94 def L6_deallocframe_map_to_rawAlias : InstAlias<"deallocframe", (L2_deallocframe D15, R30)>;
95 def L6_return_map_to_rawAlias : InstAlias<"dealloc_return", (L4_return D15, R30)>;
H A DHexagonRegisterInfo.td152 def D15 : Rd<30, "r31:30", [R30, R31], ["lr:fp"]>, DwarfRegNum<[62]>;
546 (add (sequence "D%u", 0, 4), (sequence "D%u", 6, 13), D5, D14, D15)>;
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62d2-evm.dts279 AM62DX_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
287 AM62DX_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
H A Dk3-am62a7-sk.dts280 AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
288 AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
H A Dk3-am62-pocketbeagle2.dts222 AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19/D15) MCASP0_AFSR.UART1_RXD */
H A Dk3-am642-phyboard-electra-rdk.dts294 AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
H A Dk3-am62x-sk-common.dtsi166 AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19/D15) MCASP0_AFSR.UART1_RXD */
H A Dk3-am642-sk.dts218 AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
H A Dk3-am642-evm.dts281 AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLatencyMutations.cpp835 OP.getReg() <= ARM::D15 && (OP.getReg() - ARM::D0) % 2 && in modifyMixedWidthFP()
850 if (RegID >= ARM::D1 && RegID <= ARM::D15 && (RegID - ARM::D0) % 2) in modifyMixedWidthFP()
H A DARMRegisterInfo.td136 def D15 : ARMReg<15, "d15", [S30, S31]>, DwarfRegNum<[271]>;
166 def Q7 : ARMReg< 7, "q7", [D14, D15]>;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.cpp61 case AArch64::D15: in isOdd()
H A DAArch64CallingConvention.td515 CCIfType<[f64], CCAssignToReg<[D12, D13, D14, D15]>>,
584 D12, D13, D14, D15)>;
596 D12, D13, D14, D15)>;
718 D12, D13, D14, D15)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp89 SP::D14, SP::D30, SP::D15, SP::D31 };
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-boneblue.dts459 "UART1_TX", /* D15 */
H A Dam335x-guardian.dts504 /* (D15) uart1_txd.uart1_txd */
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp718 else if (Reg1 == AArch64::D14 && Reg2 == AArch64::D15) in generateCompactUnwindEncoding()
H A DAArch64MCTargetDesc.cpp189 {codeview::RegisterId::ARM64_D15, AArch64::D15}, in initLLVMToCVRegMapping()
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-ux500-samsung-codina-tmo.dts778 /* Data lines D12-D15 GPIO82..GPIO85 */

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