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Searched refs:D14 (Results 1 – 25 of 58) sorted by relevance

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/freebsd/crypto/openssl/crypto/sha/asm/
H A Dkeccak1600-avx2.pl126 my ($C14,$C00,$D00,$D14) = @T[5..8];
157 vpermq \$0b00111001,@T[1],$D14
171 vpblendd \$0b11000000,@T[1],$D14,$D14
173 vpxor @T[4],$D14,$D14 # D[1..4] = ROL64(C[2..4,0),1) ^ C[0..3]
180 vpxor $D14,$A31,$A31 # ^= D[1..4] from Theta
185 vpxor $D14,$A21,$A21 # ^= D[1..4] from Theta
190 vpxor $D14,$A41,$A41 # ^= D[1..4] from Theta
195 vpxor $D14,$A11,$A11 # ^= D[1..4] from Theta
202 vpxor $D14,$A01,$A01 # ^= D[1..4] from Theta
H A Dkeccak1600-avx512vl.pl55 my ($C14,$C00,$D00,$D14) = @T[5..8];
82 vpermq \$0b00111001,@T[1],$D14
91 vpblendd \$0b11000000,@T[1],$D14,$D14
98 vpternlogq \$0x96,@T[0],$D14,$A31 # ^= D[1..4] from Theta
101 vpternlogq \$0x96,@T[0],$D14,$A21 # ^= D[1..4] from Theta
104 vpternlogq \$0x96,@T[0],$D14,$A41 # ^= D[1..4] from Theta
109 vpternlogq \$0x96,@T[0],$D14,$A11 # ^= D[1..4] from Theta
114 vpternlogq \$0x96,@T[0],$D14,$A01 # ^= D[1..4] from Theta
/freebsd/lib/msun/ld128/
H A Ds_expl.c193 D14 = 1.1470726176204336e-11, /* 0x1.93971dc395d9ep-37 */ variable
252 dx * (D14 + dx * (D15 + dx * (D16 + in expm1l()
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62x-sk-common.dtsi136 AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
154 AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16/D14) I2C0_SDA */
H A Dk3-am625-phyboard-lyra-rdk.dts184 AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
H A Dk3-am625-beagleplay.dts449 AM62X_IOPAD(0x01c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
H A Dk3-am62-verdin.dtsi638 AM62X_IOPAD(0x1c8, PIN_INPUT_PULLUP, 0) /* (D14) UART0_RXD */ /* SODIMM 147 */
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h105 case D15: case D14: case D13: case D12: in isARMArea3Register()
H A DARMRegisterInfo.td135 def D14 : ARMReg<14, "d14", [S28, S29]>, DwarfRegNum<[270]>;
166 def Q7 : ARMReg< 7, "q7", [D14, D15]>;
H A DARMInstrVFP.td328 …s = [VPR, FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15];
338 … FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15,
347 …s = [VPR, FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15];
358 … FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h145 case AArch64::D14: return AArch64::B14; in getBRegFromDReg()
185 case AArch64::B14: return AArch64::D14; in getDRegFromBReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.td224 def D14 : Rd<28, "f28", [F28, F29]>, DwarfRegNum<[86]>;
288 def Q7 : Rq<28, "f28", [D14, D15]>;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.cpp112 case AArch64::D14: in isOdd()
H A DAArch64CallingConvention.td493 CCIfType<[f64], CCAssignToReg<[D12, D13, D14, D15]>>,
561 D12, D13, D14, D15)>;
573 D12, D13, D14, D15)>;
682 D12, D13, D14, D15)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp88 SP::D14, SP::D30, SP::D15, SP::D31 };
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-icev2.dts160 …AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7) /* (D14) xdma_event_intr1.gpio0…
H A Dam335x-boneblue.dts460 "MOT_STBY", /* D14 */
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp732 else if (Reg1 == AArch64::D14 && Reg2 == AArch64::D15) in generateCompactUnwindEncoding()
H A DAArch64MCTargetDesc.cpp187 {codeview::RegisterId::ARM64_D14, AArch64::D14}, in initLLVMToCVRegMapping()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td151 def D14 : Rd<28, "r29:28", [R28, R29]>, DwarfRegNum<[60]>;
546 (add (sequence "D%u", 0, 4), (sequence "D%u", 6, 13), D5, D14, D15)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCTargetDesc.cpp294 {codeview::RegisterId::ARM_ND14, ARM::D14}, in initLLVMToCVRegMapping()
H A DARMAsmBackend.cpp1311 static unsigned FPRCSRegs[] = { ARM::D8, ARM::D10, ARM::D12, ARM::D14 }; in generateCompactUnwindEncoding()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.td411 D10, D11, D12, D13, D14, D15)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp607 Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15}; in DecodeDoubleRegsRegisterClass()
/freebsd/sys/contrib/edk2/Include/Library/
H A DBaseLib.h122 UINT64 D14; member

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