Searched refs:CyclesLeft (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | Instruction.cpp | 33 assert(CyclesLeft == UNKNOWN_CYCLES); in writeStartEvent()
49 CyclesLeft = TotalCycles; in writeStartEvent()
50 IsReady = !CyclesLeft; in writeStartEvent()
55 assert(CyclesLeft == UNKNOWN_CYCLES); in onInstructionIssued()
57 CyclesLeft = getLatency(); in onInstructionIssued()
63 unsigned ReadCycles = std::max(0, CyclesLeft - User.second); in onInstructionIssued()
69 PartialWrite->writeStartEvent(IID, RegisterID, CyclesLeft); in onInstructionIssued()
76 if (CyclesLeft != UNKNOWN_CYCLES) { in addUser()
77 unsigned ReadCycles = std::max(0, CyclesLeft - ReadAdvance); in addUser()
86 if (CyclesLeft != UNKNOWN_CYCLES) { in addUser()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MCA/ |
| H A D | Instruction.h | 202 int CyclesLeft; variable
250 : WD(&Desc), CyclesLeft(UNKNOWN_CYCLES), RegisterID(RegID), PRFID(0),
258 int getCyclesLeft() const { return CyclesLeft; } in getCyclesLeft()
294 unsigned CyclesLeft = getDependentWriteCyclesLeft(); in isReady() local
295 return !CyclesLeft || CyclesLeft < getLatency(); in isReady()
299 return CyclesLeft != UNKNOWN_CYCLES && CyclesLeft <= 0; in isExecuted()
307 CyclesLeft = 0; in setEliminated()
340 int CyclesLeft; variable
358 CyclesLeft(UNKNOWN_CYCLES), TotalCycles(0), CRD(), IsReady(true), in ReadState()
367 bool isPending() const { return !IndependentFromDef && CyclesLeft > 0; } in isPending()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCA/ |
| H A D | AMDGPUCustomBehaviour.cpp | 130 const int CyclesLeft = PrevInst.getCyclesLeft(); in handleWaitCnt() local
131 assert(CyclesLeft != UNKNOWN_CYCLES && in handleWaitCnt()
135 if ((unsigned)CyclesLeft < CyclesToWaitVm) in handleWaitCnt()
136 CyclesToWaitVm = CyclesLeft; in handleWaitCnt()
140 if ((unsigned)CyclesLeft < CyclesToWaitExp) in handleWaitCnt()
141 CyclesToWaitExp = CyclesLeft; in handleWaitCnt()
145 if ((unsigned)CyclesLeft < CyclesToWaitLgkm) in handleWaitCnt()
146 CyclesToWaitLgkm = CyclesLeft; in handleWaitCnt()
150 if ((unsigned)CyclesLeft < CyclesToWaitVs) in handleWaitCnt()
151 CyclesToWaitVs = CyclesLeft; in handleWaitCnt()
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| /freebsd/contrib/llvm-project/llvm/lib/MCA/Stages/ |
| H A D | InOrderIssueStage.cpp | 26 CyclesLeft = 0; in clear()
32 CyclesLeft = Cycles; in update()
40 if (!CyclesLeft) in cycleEnd()
43 --CyclesLeft; in cycleEnd()
91 int CyclesLeft = WS.getCyclesLeft(); in findFirstWriteBackCycle() local
92 if (CyclesLeft == UNKNOWN_CYCLES) in findFirstWriteBackCycle()
93 CyclesLeft = WS.getLatency(); in findFirstWriteBackCycle()
94 if (CyclesLeft < 0) in findFirstWriteBackCycle()
95 CyclesLeft = 0; in findFirstWriteBackCycle()
96 FirstWBCycle = std::min(FirstWBCycle, (unsigned)CyclesLeft); in findFirstWriteBackCycle()
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| /freebsd/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/ |
| H A D | RegisterFile.cpp | 589 Hazard.CyclesLeft = UNKNOWN_CYCLES; in checkRAWHazards()
593 int CyclesLeft = WS->getCyclesLeft() - ReadAdvance; in checkRAWHazards() local
594 if (CyclesLeft > 0) { in checkRAWHazards()
595 if (Hazard.CyclesLeft < CyclesLeft) { in checkRAWHazards()
597 Hazard.CyclesLeft = CyclesLeft; in checkRAWHazards()
607 int CyclesLeft = NegReadAdvance - Elapsed; in checkRAWHazards() local
608 assert(CyclesLeft > 0 && "Write should not be in the CommottedWrites set!"); in checkRAWHazards()
609 if (Hazard.CyclesLeft < CyclesLeft) { in checkRAWHazards()
611 Hazard.CyclesLeft = CyclesLeft; in checkRAWHazards()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MCA/Stages/ |
| H A D | InOrderIssueStage.h | 38 unsigned CyclesLeft = 0; member
44 unsigned getCyclesLeft() const { return CyclesLeft; } in getCyclesLeft()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/ |
| H A D | RegisterFile.h | 241 int CyclesLeft = 0; member
245 bool hasUnknownCycles() const { return CyclesLeft < 0; } in hasUnknownCycles()
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