| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | AutoConvert.cpp | 40 struct f_cnvrt Cvt = { in restorezOSStdHandleAutoConversion() local
45 return (fcntl(FD, F_CONTROL_CVT, &Cvt)); in restorezOSStdHandleAutoConversion()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 6679 SDValue Cvt = in ReplaceNodeResults() local
6681 Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2f16, Cvt)); in ReplaceNodeResults()
6706 SDValue Cvt = DAG.getNode(Opcode, SL, MVT::i32, Src0, Src1); in ReplaceNodeResults() local
6707 Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2i16, Cvt)); in ReplaceNodeResults()
10891 SDValue Cvt = NewLoad; in widenLoad() local
10893 Cvt = DAG.getNode(ISD::SIGN_EXTEND_INREG, SL, MVT::i32, NewLoad, in widenLoad()
10897 Cvt = DAG.getZeroExtendInReg(NewLoad, SL, TruncVT); in widenLoad()
10905 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
10909 Cvt = getLoadExtOrTrunc(DAG, Ld->getExtensionType(), Cvt, SL, IntVT); in widenLoad()
10910 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 907 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_u64_u32, DL, MVT::i64, in SelectAddrSpaceCast() local
909 Src = SDValue(Cvt, 0); in SelectAddrSpaceCast()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 19996 SDValue Cvt = DAG.getSelect(DL, MVT::v4f32, IsNeg, Slow, SignCvt); in lowerINT_TO_FP_vXi64() local
19999 return DAG.getMergeValues({Cvt, Chain}, DL); in lowerINT_TO_FP_vXi64()
20001 return Cvt; in lowerINT_TO_FP_vXi64()
34489 SDValue Cvt = DAG.getSelect(dl, MVT::v4f32, IsNeg, Slow, SignCvt); in ReplaceNodeResults() local
34490 Results.push_back(Cvt); in ReplaceNodeResults()
60222 SDValue Cvt, Chain; in combineFP_EXTEND() local
60224 Cvt = DAG.getNode(X86ISD::STRICT_CVTPH2PS, dl, {CvtVT, MVT::Other}, in combineFP_EXTEND()
60226 Chain = Cvt.getValue(1); in combineFP_EXTEND()
60228 Cvt = DAG.getNode(X86ISD::CVTPH2PS, dl, CvtVT, Src); in combineFP_EXTEND()
60233 Cvt = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v2f32, Cvt, in combineFP_EXTEND()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6356 SDValue Cvt; in ExpandBITCAST() local
6359 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6363 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6366 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4526 SDValue Cvt = DAG.getNode(Op.getOpcode(), DL, CvtVT, Op.getOperand(0)); in LowerVectorFP_TO_INT() local
4528 return DAG.getSetCC(DL, VT, Cvt, Zero, ISD::SETNE); in LowerVectorFP_TO_INT()
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