| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VERegisterInfo.td | 115 let SubRegIndices = [sub_i32, sub_f32], CoveredBySubRegs = 1 in {
136 let SubRegIndices = [sub_even, sub_odd], CoveredBySubRegs = 1 in
160 let SubRegIndices = [sub_vm_even, sub_vm_odd], CoveredBySubRegs = 1 in
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.td | 136 let SubRegIndices = [isub_lo, isub_hi], CoveredBySubRegs = 1 in {
205 let SubRegIndices = [isub_lo, isub_hi], CoveredBySubRegs = 1 in {
231 let SubRegIndices = [vsub_lo, vsub_hi, vsub_fake], CoveredBySubRegs = 1 in {
251 let SubRegIndices = [vsub_lo, vsub_hi, vsub_fake], CoveredBySubRegs = 1 in {
271 let SubRegIndices = [wsub_lo, wsub_hi], CoveredBySubRegs = 1 in {
372 let SubRegIndices = [isub_lo, isub_hi], CoveredBySubRegs = 1 in {
451 let SubRegIndices = [isub_lo, isub_hi], CoveredBySubRegs = 1 in {
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.cpp | 164 CoveredBySubRegs(R->getValueAsBit("CoveredBySubRegs")), in CodeGenRegister()
188 if (CoveredBySubRegs && !ExplicitSubRegs.empty()) in buildObjectGraph()
378 if (!CoveredBySubRegs) in computeSubRegs()
402 if (!SR->CoveredBySubRegs || SR->ExplicitSubRegs.size() <= 1 || in computeSubRegs()
1269 if (Reg.CoveredBySubRegs) in CodeGenRegBank()
2219 RC.CoveredBySubRegs = true; in computeDerivedInfo()
2222 RC.CoveredBySubRegs &= Reg->CoveredBySubRegs; in computeDerivedInfo()
2527 if (!Super->CoveredBySubRegs || Set.count(Super)) in computeCoveredRegisters()
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| H A D | CodeGenRegisters.h | 178 bool CoveredBySubRegs = true; variable
362 bool CoveredBySubRegs; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.td | 71 let CoveredBySubRegs = 1;
79 let CoveredBySubRegs = 1;
221 let CoveredBySubRegs = 1;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 44 let CoveredBySubRegs = 1;
53 let CoveredBySubRegs = 1;
60 let CoveredBySubRegs = 1;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.td | 186 let SubRegIndices = [sub_8bit, sub_8bit_hi], CoveredBySubRegs = 1 in {
192 let SubRegIndices = [sub_8bit, sub_8bit_hi_phony], CoveredBySubRegs = 1 in {
201 let SubRegIndices = [sub_8bit, sub_8bit_hi_phony], CoveredBySubRegs = 1 in {
212 let SubRegIndices = [sub_8bit, sub_8bit_hi_phony], CoveredBySubRegs = 1 in {
234 let SubRegIndices = [sub_16bit, sub_16bit_hi], CoveredBySubRegs = 1 in {
247 let SubRegIndices = [sub_16bit, sub_16bit_hi], CoveredBySubRegs = 1 in {
259 let SubRegIndices = [sub_16bit, sub_16bit_hi], CoveredBySubRegs = 1 in {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterInfo.td | 56 let CoveredBySubRegs = 1;
62 let CoveredBySubRegs = 1;
75 let CoveredBySubRegs = 1;
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | RegisterInfoEmitter.cpp | 1415 << (RC.CoveredBySubRegs ? "true" : "false") in runTargetDesc()
1842 OS << "\tCoveredBySubRegs: " << RC.CoveredBySubRegs << '\n'; in debugDump()
1885 OS << "\tCoveredBySubregs: " << R.CoveredBySubRegs << '\n'; in debugDump()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 172 if (RC->CoveredBySubRegs) in transferUsedLanes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.td | 71 let SubRegIndices = [sub_lo, sub_hi], CoveredBySubRegs = 1 in {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.td | 578 let CoveredBySubRegs = 1;
590 let CoveredBySubRegs = 1;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 69 const bool CoveredBySubRegs; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 52 let CoveredBySubRegs = 1;
188 let CoveredBySubRegs = 1 in {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterInfo.td | 22 let CoveredBySubRegs = 1;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | Target.td | 211 // CoveredBySubRegs - When this bit is set, the value of this register is
215 bit CoveredBySubRegs = false;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.td | 170 let CoveredBySubRegs = !not(ArtificialHigh);
|