Searched refs:CountReg (Results 1 – 4 of 4) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | MVETPAndVPTOptimisationsPass.cpp | 488 Register CountReg = FirstVCTP->getOperand(1).getReg(); in ConvertTailPredLoop() local 489 if (!CountReg.isVirtual()) { in ConvertTailPredLoop() 493 MachineInstr *Phi = LookThroughCOPY(MRI->getVRegDef(CountReg), MRI); in ConvertTailPredLoop() 501 CountReg = Phi->getOperand(2).getMBB() == ML->getLoopLatch() in ConvertTailPredLoop() 525 .addReg(CountReg); in ConvertTailPredLoop() 530 MRI->constrainRegClass(CountReg, &ARM::rGPRRegClass); in ConvertTailPredLoop()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonHardwareLoops.cpp | 1249 Register CountReg = MRI->createVirtualRegister(&Hexagon::IntRegsRegClass); in convertToHardwareLoop() local 1250 BuildMI(*Preheader, InsertPos, DL, TII->get(TargetOpcode::COPY), CountReg) in convertToHardwareLoop() 1254 .addReg(CountReg); in convertToHardwareLoop() 1262 Register CountReg = MRI->createVirtualRegister(&Hexagon::IntRegsRegClass); in convertToHardwareLoop() local 1263 BuildMI(*Preheader, InsertPos, DL, TII->get(Hexagon::A2_tfrsi), CountReg) in convertToHardwareLoop() 1266 .addMBB(LoopStart).addReg(CountReg); in convertToHardwareLoop()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIWholeQuadMode.cpp | 1575 Register CountReg = MRI->createVirtualRegister(&AMDGPU::SGPR_32RegClass); in lowerInitExec() local 1576 auto BfeMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_BFE_U32), CountReg) in lowerInitExec() 1582 .addReg(CountReg) in lowerInitExec() 1585 .addReg(CountReg, RegState::Kill) in lowerInitExec() 1608 LIS->createAndComputeVirtRegInterval(CountReg); in lowerInitExec()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ExpandPseudo.cpp | 727 Register CountReg = VAStartPseudoInstr->getOperand(0).getReg(); in expandVastartSaveXmmRegs() local 786 .addReg(CountReg) in expandVastartSaveXmmRegs() 787 .addReg(CountReg); in expandVastartSaveXmmRegs()
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