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Searched refs:Core (Results 1 – 25 of 219) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCRegisterInfo.td19 // Core - 32-bit core registers
20 class Core<int num, string n, list<string>altNames=[]> : ARCReg<n, altNames> {
31 def R#i : Core<i, "%r"#i>, DwarfRegNum<[i]>;
35 def R#i : Core<i, "%r"#i>, DwarfRegNum<[i]>;
39 def R#i : Core<i, "%r"#i>, DwarfRegNum<[i]>;
44 def R#i : Core<i, "%r"#i>, DwarfRegNum<[i]>;
46 def GP : Core<26, "%gp",["%r26"]>, DwarfRegNum<[26]>;
47 def FP : Core<27, "%fp", ["%r27"]>, DwarfRegNum<[27]>;
48 def SP : Core<28, "%sp", ["%r28"]>, DwarfRegNum<[28]>;
49 def ILINK : Core<29, "%ilink">, DwarfRegNum<[29]>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonShuffler.cpp203 const unsigned Units = ISJ.Core.getUnits(); in restrictSlot1AOK()
212 ISJ.Core.setUnits(Units & ~Slot1Mask); in restrictSlot1AOK()
232 unsigned Units = ISJ.Core.getUnits(); in restrictNoSlot1Store()
237 ISJ.Core.setUnits(Units & ~Slot1Mask); in restrictNoSlot1Store()
286 if (!(jumpSlot.first & Summary.branchInsts[0]->Core.getUnits())) in restrictBranchOrder()
290 if (!(jumpSlot.second & Summary.branchInsts[1]->Core.getUnits())) in restrictBranchOrder()
295 Summary.branchInsts[0]->Core.setUnits(jumpSlot.first); in restrictBranchOrder()
296 Summary.branchInsts[1]->Core.setUnits(jumpSlot.second); in restrictBranchOrder()
314 ISJ.Core.setAllUnits(); in permitNonSlot()
367 if (!ISJ->Core.getUnits()) in restrictStoreLoadOrder()
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H A DHexagonShuffler.h103 HexagonResource Core;
110 : ID(id), Extender(Extender), Core(s), CVI(MCII, STI, s, id){}; in HexagonInstr()
117 return (HexagonResource::lessWeight(B.Core, Core));
122 return (HexagonResource::lessUnits(A.Core, B.Core)); in lessCore()
104 HexagonResource Core; global() variable
/freebsd/lib/clang/liblldb/
H A DMakefile179 SRCS+= Core/Address.cpp
180 SRCS+= Core/AddressRange.cpp
181 SRCS+= Core/AddressRangeListImpl.cpp
182 SRCS+= Core/AddressResolver.cpp
183 SRCS+= Core/AddressResolverFileLine.cpp
184 SRCS+= Core/Communication.cpp
185 SRCS+= Core/DataFileCache.cpp
186 SRCS+= Core/Debugger.cpp
187 SRCS+= Core/DebuggerEvents.cpp
188 SRCS+= Core/Declaration.cpp
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DOpenCLOptions.h95 unsigned Core = 0U; member
109 : WithPragma(Pragma), Avail(AvailV), Core(CoreV), Opt(OptV) {} in OpenCLOptionInfo()
111 bool isCore() const { return Core != 0U; } in isCore()
123 return isAvailableIn(LO) && isOpenCLVersionContainedInMask(LO, Core); in isCoreIn()
/freebsd/lib/clang/libclang/
H A DMakefile809 SRCS_FUL+= StaticAnalyzer/Core/APSIntType.cpp
810 SRCS_FUL+= StaticAnalyzer/Core/AnalysisManager.cpp
811 SRCS_FUL+= StaticAnalyzer/Core/AnalyzerOptions.cpp
812 SRCS_FUL+= StaticAnalyzer/Core/BasicValueFactory.cpp
813 SRCS_FUL+= StaticAnalyzer/Core/BlockCounter.cpp
814 SRCS_FUL+= StaticAnalyzer/Core/BugReporter.cpp
815 SRCS_FUL+= StaticAnalyzer/Core/BugReporterVisitors.cpp
816 SRCS_FUL+= StaticAnalyzer/Core/BugSuppression.cpp
817 SRCS_FUL+= StaticAnalyzer/Core/CallDescription.cpp
818 SRCS_FUL+= StaticAnalyzer/Core/CallEvent.cpp
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/freebsd/contrib/llvm-project/clang/include/
H A Dmodule.modulemap149 module Clang_Rewrite { requires cplusplus umbrella "clang/Rewrite/Core" module * { export * } }
164 umbrella "clang/StaticAnalyzer/Core"
166 textual header "clang/StaticAnalyzer/Core/Analyses.def"
167 textual header "clang/StaticAnalyzer/Core/AnalyzerOptions.def"
168 textual header "clang/StaticAnalyzer/Core/PathSensitive/SVals.def"
169 textual header "clang/StaticAnalyzer/Core/PathSensitive/Symbols.def"
170 textual header "clang/StaticAnalyzer/Core/PathSensitive/Regions.def"
209 umbrella "clang/Tooling/Core" module * { export * }
/freebsd/contrib/file/magic/Magdir/
H A Ddigital46 # The actual magic number is just "Core", followed by a 2-byte version
47 # number; however, treating any file that begins with "Core" as a Digital
52 0 string Core\001 Alpha COFF format core dump (Digital UNIX)
54 0 string Core\002 Alpha COFF format core dump (Digital UNIX)
/freebsd/sys/contrib/device-tree/Bindings/display/ti/
H A Dti,omap-dss.txt11 The OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
12 a number of encoder modules. All DSS versions contain DSS Core and DISPC, but
15 The DSS Core is the parent of the other DSS modules, and manages clock routing,
27 The DSS Core and the encoders have video port outputs. The structure of the
90 DSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector
/freebsd/sys/contrib/device-tree/src/arm64/apple/
H A Ds5l8960x-pmgr.dtsi15 apple,always-on; /* Core device */
24 apple,always-on; /* Core device */
51 apple,always-on; /* Core device */
60 apple,always-on; /* Core device */
69 apple,always-on; /* Core device */
78 apple,always-on; /* Core device */
404 apple,always-on; /* Core device */
456 apple,always-on; /* Core device */
465 apple,always-on; /* Core device */
474 apple,always-on; /* Core device */
[all …]
H A Dt7001-pmgr.dtsi15 apple,always-on; /* Core device */
24 apple,always-on; /* Core device */
33 apple,always-on; /* Core device */
42 apple,always-on; /* Core device */
59 apple,always-on; /* Core device */
68 apple,always-on; /* Core device */
77 apple,always-on; /* Core device */
327 apple,always-on; /* Core device */
499 apple,always-on; /* Core device */
508 apple,always-on; /* Core device */
[all …]
H A Dt8012-pmgr.dtsi15 apple,always-on; /* Core device */
24 apple,always-on; /* Core device */
33 apple,always-on; /* Core device */
76 apple,always-on; /* Core device */
253 apple,always-on; /* Core device */
286 apple,always-on; /* Core device */
773 apple,always-on; /* Core AON device */
782 apple,always-on; /* Core AON device */
791 apple,always-on; /* Core AON device */
800 apple,always-on; /* Core AON device */
[all …]
H A Dt7000-pmgr.dtsi14 apple,always-on; /* Core device */
23 apple,always-on; /* Core device */
32 apple,always-on; /* Core device */
49 apple,always-on; /* Core device */
58 apple,always-on; /* Core device */
67 apple,always-on; /* Core device */
317 apple,always-on; /* Core device */
481 apple,always-on; /* Core device */
490 apple,always-on; /* Core device */
535 apple,always-on; /* Core device */
H A Dt8103-pmgr.dtsi16 apple,always-on; /* Core device */
25 apple,always-on; /* Core device */
34 apple,always-on; /* Core device */
75 apple,always-on; /* Core device */
84 apple,always-on; /* Core device */
138 apple,always-on; /* Core device */
1015 apple,always-on; /* Core AON device */
1024 apple,always-on; /* Core AON device */
1033 apple,always-on; /* Core AON device */
1042 apple,always-on; /* Core AON device */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dmvebu-corediv-clock.txt1 * Core Divider Clock bindings for Marvell MVEBU SoCs
12 - reg : must be the register address of Core Divider control register
H A Ddove-divider-clock.txt18 - reg : shall be the register address of the Core PLL and Clock Divider
20 Core PLL and Clock Divider Control 1 register. Thus, it will have
H A Dmvebu-gated-clock.txt38 15 sata0_core SATA 0 Core
44 21 sata1_core SATA 1 Core
50 29 crypto0_core Cryptographic Unit Port 0 Core
52 31 crypto1_core Cryptographic Unit Port 1 Core
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dimg-ir-rev1.txt16 1st: Core clock (defaults to 32.768KHz if omitted).
22 "core": Core clock.
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonScheduleV67T.td1 //=- HexagonScheduleV67T.td - Hexagon V67 Tiny Core Scheduling Definitions --=//
60 // Hexagon V67 Tiny Core Resource Definitions -
H A DHexagonScheduleV71T.td1 //=-HexagonScheduleV71T.td - Hexagon V71 Tiny Core Scheduling Definition ----=//
58 // Hexagon V71 Tiny Core Resource Definitions -
/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/
H A Dqcom,apr.txt36 3 - DSP Core Service
43 10 - Core voice stream.
44 11 - Core voice processor.
/freebsd/contrib/llvm-project/lldb/source/Utility/
H A DArchSpec.cpp26 static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2,
37 ArchSpec::Core core;
261 ArchSpec::Core core;
511 static inline const CoreDefinition *FindCoreDefinition(ArchSpec::Core core) { in FindCoreDefinition()
533 FindArchDefinitionEntry(const ArchDefinition *def, ArchSpec::Core core) { in FindArchDefinitionEntry()
1114 static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2, in cores_match()
1432 const ArchSpec::Core lhs_core = lhs.GetCore(); in operator <()
1433 const ArchSpec::Core rhs_core = rhs.GetCore(); in operator <()
1468 if (GetCore() == ArchSpec::Core::eCore_arm_armv7m || in IsAlwaysThumbInstructions()
1469 GetCore() == ArchSpec::Core::eCore_arm_armv7em || in IsAlwaysThumbInstructions()
[all …]
/freebsd/sys/contrib/edk2/Include/Protocol/
H A DMpService.h97 UINT32 Core; member
127 UINT32 Core; member
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j784s4-j742s2-common.dtsi86 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIe0 Core*/
87 <0x00 0x0d800000 0x00 0x0d800000 0x00 0x00800000>, /* PCIe1 Core*/
88 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00800000>, /* PCIe2 Core*/
89 <0x00 0x0e800000 0x00 0x0e800000 0x00 0x00800000>, /* PCIe3 Core*/
/freebsd/contrib/llvm-project/lldb/include/lldb/Utility/
H A DArchSpec.h125 enum Core { enum
442 Core GetCore() const { return m_core; } in GetCore()
544 Core m_core = kCore_invalid;

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