| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 279 SDValue CopyToReg = in SelectInlineAsmMemoryOperand() local
283 CurDAG->getCopyFromReg(CopyToReg, dl, VReg, TL.getPointerTy(DL)); in SelectInlineAsmMemoryOperand()
308 SDValue CopyToReg = CurDAG->getCopyToReg(Op, dl, VReg, Op); in SelectInlineAsmMemoryOperand() local
310 CurDAG->getCopyFromReg(CopyToReg, dl, VReg, TL.getPointerTy(DL)); in SelectInlineAsmMemoryOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 85 case ISD::CopyToReg: break; in numberRCValPredInSU()
122 case ISD::CopyToReg: NumberDeps++; break; in numberRCValSuccInSU()
444 case ISD::CopyToReg: in SUSchedulingCost()
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| H A D | InstrEmitter.cpp | 111 if (User->getOpcode() == ISD::CopyToReg && in EmitCopyFromReg()
230 if (User->getOpcode() == ISD::CopyToReg && in CreateVirtualRegisters()
511 if (User->getOpcode() == ISD::CopyToReg && in EmitSubregNode()
1176 } else if (F->getOpcode() == ISD::CopyToReg) { in EmitMachineNode()
1252 case ISD::CopyToReg: { in EmitSpecialNode()
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| H A D | ScheduleDAGRRList.cpp | 712 case ISD::CopyToReg: in EmitNode()
1391 if (Node->getOpcode() == ISD::CopyToReg) { in DelayForLiveRegsBottomUp()
2043 if (Opc == ISD::TokenFactor || Opc == ISD::CopyToReg) in getNodePriority()
2259 if (N->getOpcode() != ISD::CopyToReg) in unscheduledNode()
2354 Succ.getSUnit()->getNode()->getOpcode() == ISD::CopyToReg) in closestSucc()
2402 if (SuccSU->getNode() && SuccSU->getNode()->getOpcode() == ISD::CopyToReg) { in hasOnlyLiveOutUses()
2731 if (Opc == ISD::TokenFactor || Opc == ISD::CopyToReg) in canEnableCoalescing()
2970 if (N->getOpcode() == ISD::CopyToReg && in PrescheduleNodesWithMultipleUses()
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| H A D | ScheduleDAGSDNodes.cpp | 116 if (Op != 2 || User->getOpcode() != ISD::CopyToReg) in CheckForPhysRegDependency()
432 if (SUNode->getOpcode() != ISD::CopyToReg) in BuildSchedUnits()
665 if (Latency > 1U && Use->getOpcode() == ISD::CopyToReg && in computeOperandLatency()
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| H A D | ScheduleDAGFast.cpp | 514 if (Node->getOpcode() == ISD::CopyToReg) { in DelayForLiveRegsBottomUp()
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| H A D | SelectionDAGDumper.cpp | 183 case ISD::CopyToReg: return "CopyToReg"; in getOperationName()
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| H A D | SelectionDAGISel.cpp | 871 if (N->getOpcode() != ISD::CopyToReg) in ComputeLiveOutVRegInfo()
3210 case ISD::CopyToReg: in SelectCodeCommon()
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| H A D | DAGCombiner.cpp | 2236 case ISD::CopyToReg: in visitTokenFactor()
12987 if (User->getOpcode() == ISD::CopyToReg) in ExtendUsesToFormExtLoad()
12996 if (Use.getResNo() == 0 && Use.getUser()->getOpcode() == ISD::CopyToReg) { in ExtendUsesToFormExtLoad()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 209 CopyToReg, enumerator
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| H A D | SelectionDAG.h | 787 return getNode(ISD::CopyToReg, dl, MVT::Other, Chain,
798 return getNode(ISD::CopyToReg, dl, VTs,
807 return getNode(ISD::CopyToReg, dl, VTs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 349 if (N->getOpcode() == ISD::CopyToReg) { in getOperandRegClass()
650 case ISD::CopyToReg: { in Select()
2384 if (Cond.getOpcode() == ISD::CopyToReg) in isCBranchSCC()
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| H A D | SIISelLowering.cpp | 6615 SDNode *CopyToReg = findUser(SDValue(Intr, i), ISD::CopyToReg); in LowerBRCOND() local
6616 if (!CopyToReg) in LowerBRCOND()
6621 CopyToReg->getOperand(1), in LowerBRCOND()
6625 DAG.ReplaceAllUsesWith(SDValue(CopyToReg, 0), CopyToReg->getOperand(0)); in LowerBRCOND()
12341 for (auto VectorwiseOp : {ISD::STORE, ISD::CopyToReg, ISD::CopyFromReg}) in performOrCombine()
14998 if (Node->getOpcode() == ISD::CopyToReg) { in legalizeTargetIndependentNode()
16481 if (User->getOpcode() != ISD::CopyToReg) in checkForPhysRegDependency()
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| H A D | AMDGPUISelLowering.cpp | 724 case ISD::CopyToReg: in hasSourceMods()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 307 setOperationAction(ISD::CopyToReg, MVT::Other, Custom); in WebAssemblyTargetLowering()
1473 case ISD::CopyToReg: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 522 case ISD::CopyToReg: { in Select()
3845 SDValue NewValue = CurDAG->getNode(ISD::CopyToReg, DL, SmallVector<EVT>(N->values()), NewOps); in SelectV2I64toI128()
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| H A D | NVPTXISelLowering.cpp | 868 setOperationAction(ISD::CopyToReg, MVT::i128, Custom); in NVPTXTargetLowering()
2816 case ISD::CopyToReg: in LowerOperation()
3136 return DAG.getNode(ISD::CopyToReg, DL, ResultsType, NewOps); in LowerCopyToReg_128()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 1891 if (CCUser->getOpcode() == ISD::CopyToReg || in IsProfitableToFold()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 3285 if (UI->getOpcode() != ISD::CopyToReg || in onlyUsesZeroFlag()
3321 if (UI->getOpcode() != ISD::CopyToReg || in hasNoSignFlagUses()
3379 if (UIOpc == ISD::CopyToReg) { in hasNoCarryFlagUses()
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| H A D | X86ISelLoweringCall.cpp | 949 if (Copy->getOpcode() == ISD::CopyToReg) { in isUsedByReturnOnly()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2947 case ISD::CopyToReg: in isI32Insn()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 3538 if (!Glued || Glued->getOpcode() != ISD::CopyToReg) in getMaskSetter()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 518 if (Use->getOpcode() == ISD::CopyToReg) in hasNoVMLxHazardUse()
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| H A D | ARMISelLowering.cpp | 3377 if (Copy->getOpcode() == ISD::CopyToReg) { in isUsedByReturnOnly()
3388 if (U->getOpcode() != ISD::CopyToReg) in isUsedByReturnOnly()
3415 if (Copy->getOpcode() != ISD::CopyToReg || !Copy->hasNUsesOfValue(1, 0)) in isUsedByReturnOnly()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 5192 if (Copy->getOpcode() != ISD::CopyToReg) in isUsedByReturnOnly()
|