Searched refs:CopyOpc (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ThumbRegisterInfo.cpp | 260 int CopyOpc = 0; in emitThumbRegPlusImmediate() local
288 CopyOpc = ARM::tMOVr; in emitThumbRegPlusImmediate()
298 CopyOpc = ARM::tADDrSPi; in emitThumbRegPlusImmediate()
306 CopyOpc = isSub ? ARM::tSUBi3 : ARM::tADDi3; in emitThumbRegPlusImmediate()
311 CopyOpc = ARM::tMOVr; in emitThumbRegPlusImmediate()
323 CopyOpc = ARM::tMOVr; in emitThumbRegPlusImmediate()
336 if (CopyOpc && Bytes < CopyScale) { in emitThumbRegPlusImmediate()
337 CopyOpc = ARM::tMOVr; in emitThumbRegPlusImmediate()
343 unsigned RequiredCopyInstrs = CopyOpc ? 1 : 0; in emitThumbRegPlusImmediate()
371 if (CopyOpc) { in emitThumbRegPlusImmediate()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyCFGStackify.cpp | 1162 unsigned CopyOpc = in unstackifyVRegsUsedInSplitBB() local
1164 BuildMI(MBB, &MI, MI.getDebugLoc(), TII.get(CopyOpc), TeeReg) in unstackifyVRegsUsedInSplitBB()
1166 BuildMI(MBB, &MI, MI.getDebugLoc(), TII.get(CopyOpc), Reg).addReg(DefReg); in unstackifyVRegsUsedInSplitBB()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 2452 unsigned CopyOpc = TargetOpcode::COPY; in optimizeSpillSlots() local
2454 CopyOpc = (MemSize == 1) ? Hexagon::A2_sxtb : Hexagon::A2_sxth; in optimizeSpillSlots()
2456 CopyOpc = (MemSize == 1) ? Hexagon::A2_zxtb : Hexagon::A2_zxth; in optimizeSpillSlots()
2457 CopyOut = BuildMI(B, It, DL, HII.get(CopyOpc), DstR) in optimizeSpillSlots()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3989 static bool getLaneCopyOpcode(unsigned &CopyOpc, unsigned &ExtractSubReg, in getLaneCopyOpcode() argument
3995 CopyOpc = AArch64::DUPi8; in getLaneCopyOpcode()
3999 CopyOpc = AArch64::DUPi16; in getLaneCopyOpcode()
4003 CopyOpc = AArch64::DUPi32; in getLaneCopyOpcode()
4007 CopyOpc = AArch64::DUPi64; in getLaneCopyOpcode()
4022 unsigned CopyOpc = 0; in emitExtractVectorElt() local
4024 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, ScalarTy.getSizeInBits())) { in emitExtractVectorElt()
4070 MIRBuilder.buildInstr(CopyOpc, {*DstReg}, {InsertReg}).addImm(LaneIdx); in emitExtractVectorElt()
4177 unsigned CopyOpc = 0; in selectUnmergeValues() local
4179 if (!getLaneCopyOpcode(CopyOpc, ExtractSubReg, NarrowTy.getSizeInBits())) in selectUnmergeValues()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 2512 unsigned CopyOpc = AMDGPU::COPY; in tryFoldPhiAGPR() local
2535 CopyOpc = AMDGPU::V_ACCVGPR_WRITE_B32_e64; in tryFoldPhiAGPR()
2547 TII->get(CopyOpc), NewReg) in tryFoldPhiAGPR()
|