Searched refs:CondCycles (Results 1 – 8 of 8) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | EarlyIfConversion.cpp | 115 int CondCycles = 0, TCycles = 0, FCycles = 0; member 530 PI.TReg, PI.FReg, PI.CondCycles, PI.TCycles, in canConvertIf() 969 unsigned CondDepth = adjCycles(BranchDepth, PI.CondCycles); in shouldConvertIf()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetInstrInfo.h | 937 int &CondCycles, int &TrueCycles, in canInsertSelect() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 553 Register FalseReg, int &CondCycles, in canInsertSelect() argument 574 CondCycles = 2; in canInsertSelect()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.h | 367 Register TrueReg, Register FalseReg, int &CondCycles,
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H A D | SIInstrInfo.cpp | 3224 Register FalseReg, int &CondCycles, in canInsertSelect() argument 3235 CondCycles = TrueCycles = FalseCycles = NumInsts; // ??? in canInsertSelect() 3255 CondCycles = TrueCycles = FalseCycles = NumInsts; // ??? in canInsertSelect()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 1523 Register FalseReg, int &CondCycles, in canInsertSelect() argument 1559 CondCycles = 1; in canInsertSelect()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 705 Register FalseReg, int &CondCycles, in canInsertSelect() argument 729 CondCycles = 1 + ExtraCondLat; in canInsertSelect() 742 CondCycles = 5 + ExtraCondLat; in canInsertSelect()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 4100 Register FalseReg, int &CondCycles, in canInsertSelect() argument 4124 CondCycles = 2; in canInsertSelect()
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