| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64GlobalISelUtils.cpp | 129 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, in changeFCMPPredToAArch64CC() argument
130 AArch64CC::CondCode &CondCode2) { in changeFCMPPredToAArch64CC()
136 CondCode = AArch64CC::EQ; in changeFCMPPredToAArch64CC()
139 CondCode = AArch64CC::GT; in changeFCMPPredToAArch64CC()
142 CondCode = AArch64CC::GE; in changeFCMPPredToAArch64CC()
145 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
148 CondCode = AArch64CC::LS; in changeFCMPPredToAArch64CC()
151 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
155 CondCode = AArch64CC::VC; in changeFCMPPredToAArch64CC()
158 CondCode = AArch64CC::VS; in changeFCMPPredToAArch64CC()
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| H A D | AArch64GlobalISelUtils.h | 69 AArch64CC::CondCode &CondCode,
70 AArch64CC::CondCode &CondCode2);
80 AArch64CC::CondCode &CondCode,
81 AArch64CC::CondCode &CondCode2,
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| H A D | AArch64InstructionSelector.cpp | 318 AArch64CC::CondCode CC,
325 AArch64CC::CondCode Pred,
342 std::pair<MachineInstr *, AArch64CC::CondCode>
350 MachineInstr *emitConjunction(Register Val, AArch64CC::CondCode &OutCC,
354 AArch64CC::CondCode Predicate,
355 AArch64CC::CondCode OutCC,
357 MachineInstr *emitConjunctionRec(Register Val, AArch64CC::CondCode &OutCC,
359 AArch64CC::CondCode Predicate,
1175 Register False, AArch64CC::CondCode CC, in emitSelect()
1344 static AArch64CC::CondCode changeICMPPredToAArch64CC(CmpInst::Predicate P) { in changeICMPPredToAArch64CC()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1574 enum CondCode { enum
1607 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC()
1613 inline bool isUnsignedIntSetCC(CondCode Code) { in isUnsignedIntSetCC()
1619 inline bool isIntEqualitySetCC(CondCode Code) { in isIntEqualitySetCC()
1625 inline bool isFPEqualitySetCC(CondCode Code) { in isFPEqualitySetCC()
1632 inline bool isTrueWhenEqual(CondCode Cond) { return ((int)Cond & 1) != 0; } in isTrueWhenEqual()
1637 inline unsigned getUnorderedFlavor(CondCode Cond) { in getUnorderedFlavor()
1643 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1663 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
1668 CondCode getSetCCSwappedOperands(CondCode Operation);
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| H A D | Analysis.h | 109 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
113 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
117 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
121 ICmpInst::Predicate getICmpCondCode(ISD::CondCode Pred);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ConditionOptimizer.cpp | 102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>;
112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
230 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
244 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
275 AArch64CC::CondCode Cmp; in modifyCmp()
304 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
308 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
318 AArch64CC::CondCode Cmp, MachineInstr *To, int ToImm) in adjustTo()
375 AArch64CC::CondCode HeadCmp; in runOnMachineFunction()
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| H A D | AArch64SpeculationHardening.cpp | 154 AArch64CC::CondCode &CondCode) const;
156 AArch64CC::CondCode &CondCode, DebugLoc DL) const;
188 AArch64CC::CondCode &CondCode) const { in endsWithCondControlFlow()
211 // translate analyzeBranchCondCode to CondCode. in endsWithCondControlFlow()
213 CondCode = AArch64CC::CondCode(analyzeBranchCondCode[0].getImm()); in endsWithCondControlFlow()
226 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode in insertTrackingCode() argument
247 AArch64CC::CondCode CondCode; instrumentControlFlow() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VE.h | 42 enum CondCode { enum
85 inline static const char *VECondCodeToString(VECC::CondCode CC) { in VECondCodeToString()
114 inline static VECC::CondCode stringToVEICondCode(StringRef S) { in stringToVEICondCode()
115 return StringSwitch<VECC::CondCode>(S) in stringToVEICondCode()
128 inline static VECC::CondCode stringToVEFCondCode(StringRef S) { in stringToVEFCondCode()
129 return StringSwitch<VECC::CondCode>(S) in stringToVEFCondCode()
150 inline static bool isIntVECondCode(VECC::CondCode CC) { in isIntVECondCode()
154 inline static unsigned VECondCodeToVal(VECC::CondCode CC) { in VECondCodeToVal()
205 inline static VECC::CondCode VEValToCondCode(unsigned Val, bool IsInteger) { in VEValToCondCode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiCondCode.h | 10 enum CondCode { enum
34 inline static StringRef lanaiCondCodeToString(LPCC::CondCode CC) { in lanaiCondCodeToString()
73 inline static CondCode suffixToLanaiCondCode(StringRef S) { in suffixToLanaiCondCode()
74 return StringSwitch<CondCode>(S) in suffixToLanaiCondCode()
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| H A D | LanaiInstrInfo.cpp | 124 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition()
353 SmallVector<std::pair<MachineOperand *, LPCC::CondCode>, 4> in optimizeCompareInstr()
373 LPCC::CondCode CC; in optimizeCompareInstr()
374 CC = (LPCC::CondCode)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
377 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
521 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
523 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
525 NewMI.addImm(CondCode); in optimizeSelect()
622 LPCC::CondCode BranchCond = in analyzeBranch()
623 static_cast<LPCC::CondCode>(Instruction->getOperand(1).getImm()); in analyzeBranch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.cpp | 37 enum CondCode { enum
133 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) in GetCondFromBranchOpc()
146 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) in GetCondBranchFromCond()
157 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
212 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); in analyzeBranch()
233 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); in analyzeBranch()
289 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
298 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
403 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())); in reverseBranchCondition()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 48 std::pair<CondCode, bool> getX86ConditionCode(CmpInst::Predicate Predicate);
60 CondCode getCondFromMI(const MachineInstr &MI);
63 CondCode getCondFromBranch(const MachineInstr &MI);
66 CondCode getCondFromSETCC(const MachineInstr &MI);
69 CondCode getCondFromCMov(const MachineInstr &MI);
72 CondCode getCondFromCFCMov(const MachineInstr &MI);
75 CondCode getCondFromCCMP(const MachineInstr &MI);
78 int getCCMPCondFlagsFromCondCode(CondCode CC);
88 CondCode GetOppositeBranchCondition(CondCode CC);
91 unsigned getVPCMPImmForCond(ISD::CondCode CC);
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| H A D | X86FlagsCopyLowering.cpp | 100 const DebugLoc &TestLoc, X86::CondCode Cond);
103 const DebugLoc &TestLoc, X86::CondCode Cond, CondRegArray &CondRegs);
722 X86::CondCode Cond = X86::getCondFromSETCC(MI); in collectCondsInRegs()
740 const DebugLoc &TestLoc, X86::CondCode Cond) { in promoteCondToReg()
752 const DebugLoc &TestLoc, X86::CondCode Cond, CondRegArray &CondRegs) { in getCondOrInverseInReg()
779 X86::CondCode Cond = X86::getCondFromSETCC(MI); in rewriteSetCC()
817 X86::CondCode Cond = X86::COND_B; // CF == 1 in rewriteArithmetic()
844 static X86::CondCode getImplicitCondFromMI(unsigned Opc) { in getImplicitCondFromMI()
866 static unsigned getOpcodeWithCC(unsigned Opc, X86::CondCode CC) { in getOpcodeWithCC()
894 X86::CondCode CC = X86::getCondFromMI(MI); in rewriteMI()
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| H A D | X86CmovConversion.cpp | 297 X86::CondCode FirstCC = X86::COND_INVALID, FirstOppCC = X86::COND_INVALID, in collectCmovCandidates()
309 X86::CondCode CC = X86::getCondFromCMov(I); in collectCmovCandidates()
672 X86::CondCode CC = X86::CondCode(X86::getCondFromCMov(MI)); in convertCmovInstsToBranches()
673 X86::CondCode OppCC = X86::GetOppositeBranchCondition(CC); in convertCmovInstsToBranches()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 334 unsigned CondCode; in parseJccInstruction() local
336 CondCode = MSP430CC::COND_NE; in parseJccInstruction()
338 CondCode = MSP430CC::COND_E; in parseJccInstruction()
340 CondCode = MSP430CC::COND_LO; in parseJccInstruction()
342 CondCode = MSP430CC::COND_HS; in parseJccInstruction()
344 CondCode = MSP430CC::COND_N; in parseJccInstruction()
346 CondCode = MSP430CC::COND_GE; in parseJccInstruction()
348 CondCode = MSP430CC::COND_L; in parseJccInstruction()
350 CondCode = MSP430CC::COND_NONE; in parseJccInstruction()
354 if (CondCode == (unsigned)MSP430CC::COND_NONE) in parseJccInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.h | 34 enum CondCode { enum
58 static inline M68k::CondCode GetOppositeBranchCondition(M68k::CondCode CC) { in GetOppositeBranchCondition()
97 static inline unsigned GetCondBranchFromCond(M68k::CondCode CC) { in GetCondBranchFromCond()
132 static inline M68k::CondCode GetCondFromBranchOpc(unsigned Opcode) { in GetCondFromBranchOpc()
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| H A D | M68kISelLowering.cpp | 1653 static SDValue getBitTestCondition(SDValue Src, SDValue BitNo, ISD::CondCode CC, in getBitTestCondition()
1669 M68k::CondCode Cond = CC == ISD::SETEQ ? M68k::COND_NE : M68k::COND_EQ; in getBitTestCondition()
1675 static SDValue LowerAndToBTST(SDValue And, ISD::CondCode CC, const SDLoc &DL, in LowerAndToBTST()
1723 static M68k::CondCode TranslateIntegerM68kCC(ISD::CondCode SetCCOpcode) { in TranslateIntegerM68kCC()
1753 static unsigned TranslateM68kCC(ISD::CondCode SetCCOpcode, const SDLoc &DL, in TranslateM68kCC()
1834 static SDValue LowerTruncateToBTST(SDValue Op, ISD::CondCode CC, in LowerTruncateToBTST()
2132 SDValue M68kTargetLowering::LowerToBTST(SDValue Op, ISD::CondCode CC, in LowerToBTST()
2149 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); in LowerSETCC()
2173 M68k::CondCode CCode = (M68k::CondCode)Op0.getConstantOperandVal(0); in LowerSETCC()
2189 ISD::CondCode NewCC = ISD::GlobalISel::getSetCCInverse(CC, true); in LowerSETCC()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 37 enum CondCode { enum
47 CondCode getOppositeBranchCondition(CondCode);
48 unsigned getBrCond(CondCode CC, bool Imm = false);
68 const MCInstrDesc &getBrCond(RISCVCC::CondCode CC, bool Imm = false) const;
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| H A D | RISCVISelDAGToDAG.h | 95 bool selectSETCC(SDValue N, ISD::CondCode ExpectedCCVal, SDValue &Val);
169 static RISCVCC::CondCode getRISCVCCForIntCC(ISD::CondCode CC) { in getRISCVCCForIntCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/MCTargetDesc/ |
| H A D | ARCInstPrinter.cpp | 54 static const char *ARCCondCodeToString(ARCCC::CondCode CC) { in ARCCondCodeToString()
172 O << ARCCondCodeToString((ARCCC::CondCode)Op.getImm()); in printPredicateOperand()
184 O << ARCCondCodeToString((ARCCC::CondCode)MI->getOperand(OpNum).getImm()); in printCCOperand()
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| H A D | ARCInfo.h | 24 enum CondCode { enum
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiInstPrinter.cpp | 290 LPCC::CondCode CC = in printCCOperand()
291 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printCCOperand()
301 LPCC::CondCode CC = in printPredicateOperand()
302 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printPredicateOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsInstPrinter.h | 32 enum CondCode { enum
72 const char *MipsFCCToString(Mips::CondCode CC);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 255 enum CondCode { // Meaning (integer) Meaning (floating-point) enum
282 inline static const char *getCondCodeName(CondCode Code) { in getCondCodeName()
304 inline static CondCode getInvertedCondCode(CondCode Code) { in getInvertedCondCode()
307 return static_cast<CondCode>(static_cast<unsigned>(Code) ^ 0x1); in getInvertedCondCode()
314 inline static unsigned getNZCVToSatisfyCondCode(CondCode Code) { in getNZCVToSatisfyCondCode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 1058 LPCC::CondCode CondCode = in splitMnemonic() local
1060 if (CondCode != LPCC::UNKNOWN) { in splitMnemonic()
1064 MCConstantExpr::create(CondCode, getContext()), NameLoc, NameLoc)); in splitMnemonic()
1078 LPCC::CondCode CondCode = LPCC::suffixToLanaiCondCode(Mnemonic); in splitMnemonic() local
1079 if (CondCode != LPCC::UNKNOWN) { in splitMnemonic()
1093 MCConstantExpr::create(CondCode, getContext()), NameLoc, NameLoc)); in splitMnemonic()
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