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Searched refs:CondBr (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RedundantCopyElimination.cpp92 bool knownRegValInBlock(MachineInstr &CondBr, MachineBasicBlock *MBB,
124 MachineInstr &CondBr, MachineBasicBlock *MBB, in knownRegValInBlock() argument
126 unsigned Opc = CondBr.getOpcode(); in knownRegValInBlock()
131 MBB == CondBr.getOperand(1).getMBB()) || in knownRegValInBlock()
133 MBB != CondBr.getOperand(1).getMBB())) { in knownRegValInBlock()
134 FirstUse = CondBr; in knownRegValInBlock()
135 KnownRegs.push_back(RegImm(CondBr.getOperand(0).getReg(), 0)); in knownRegValInBlock()
144 AArch64CC::CondCode CC = (AArch64CC::CondCode)CondBr.getOperand(0).getImm(); in knownRegValInBlock()
148 MachineBasicBlock *BrTarget = CondBr.getOperand(1).getMBB(); in knownRegValInBlock()
155 assert(PredMBB == CondBr.getParent() && in knownRegValInBlock()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRedundantCopyElimination.cpp145 MachineBasicBlock::iterator CondBr = PredMBB->getFirstTerminator(); in optimizeBlock() local
146 assert((CondBr->getOpcode() == RISCV::BEQ || in optimizeBlock()
147 CondBr->getOpcode() == RISCV::BNE) && in optimizeBlock()
149 assert(CondBr->getOperand(0).getReg() == TargetReg && "Unexpected register"); in optimizeBlock()
153 CondBr->clearRegisterKills(TargetReg, TRI); in optimizeBlock()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/
H A DHotColdSplitting.cpp116 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in analyzeProfMetadata() local
117 if (!CondBr) in analyzeProfMetadata()
121 if (!extractBranchWeights(*CondBr, TrueWt, FalseWt)) in analyzeProfMetadata()
132 AnnotatedColdBlocks.insert(CondBr->getSuccessor(0)); in analyzeProfMetadata()
135 AnnotatedColdBlocks.insert(CondBr->getSuccessor(1)); in analyzeProfMetadata()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DJumpThreading.cpp150 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in updatePredecessorProfileMetadata() local
151 if (!CondBr) in updatePredecessorProfileMetadata()
155 if (!extractBranchWeights(*CondBr, TrueWeight, FalseWeight)) in updatePredecessorProfileMetadata()
2138 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in maybethreadThroughTwoBasicBlocks() local
2139 if (!CondBr) in maybethreadThroughTwoBasicBlocks()
2213 BasicBlock *SuccBB = CondBr->getSuccessor(PredPredBB == ZeroPred); in maybethreadThroughTwoBasicBlocks()
2272 BranchInst *CondBr = cast<BranchInst>(BB->getTerminator()); in threadThroughTwoBasicBlocks() local
2315 {{DominatorTree::Insert, NewBB, CondBr->getSuccessor(0)}, in threadThroughTwoBasicBlocks()
2316 {DominatorTree::Insert, NewBB, CondBr->getSuccessor(1)}, in threadThroughTwoBasicBlocks()
2855 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in tryToUnfoldSelect() local
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H A DSimpleLoopUnswitch.cpp2721 auto *CondBr = cast<BranchInst>(HeadBB->getTerminator()); in turnSelectIntoBranch()
2722 BasicBlock *ThenBB = CondBr->getSuccessor(0), in turnSelectIntoBranch()
2723 *TailBB = CondBr->getSuccessor(1); in turnSelectIntoBranch()
2739 return CondBr; in turnSelectIntoBranch()
2720 auto *CondBr = cast<BranchInst>(HeadBB->getTerminator()); turnSelectIntoBranch() local
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanRecipes.cpp508 BranchInst *CondBr = in generatePerPart() local
510 CondBr->setSuccessor(0, nullptr); in generatePerPart()
514 return CondBr; in generatePerPart()
518 CondBr->setSuccessor(1, State.CFG.VPBB2IRBB[Header]); in generatePerPart()
519 return CondBr; in generatePerPart()
539 BranchInst *CondBr = Builder.CreateCondBr(Cond, Builder.GetInsertBlock(), in generatePerPart() local
541 CondBr->setSuccessor(0, nullptr); in generatePerPart()
543 return CondBr; in generatePerPart()
1951 auto *CondBr = BranchInst::Create(State.CFG.PrevBB, nullptr, ConditionBit); in execute() local
1952 CondBr->setSuccessor(0, nullptr); in execute()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp720 for (auto *CondBr : CondBrs) in tracePredStateThroughCFG() local
721 ++SuccCounts[CondBr->getOperand(0).getMBB()]; in tracePredStateThroughCFG()
787 for (auto *CondBr : CondBrs) { in tracePredStateThroughCFG() local
788 MachineBasicBlock &Succ = *CondBr->getOperand(0).getMBB(); in tracePredStateThroughCFG()
791 X86::CondCode Cond = X86::getCondFromBranch(*CondBr); in tracePredStateThroughCFG()
795 BuildCheckingBlockForSuccAndConds(MBB, Succ, SuccCount, CondBr, UncondBr, in tracePredStateThroughCFG()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp3175 MachineInstr *CondBr = in insertBranch() local
3180 preserveCondRegFlags(CondBr->getOperand(1), Cond[1]); in insertBranch()
3181 fixImplicitOperands(*CondBr); in insertBranch()
3190 MachineInstr *CondBr = in insertBranch() local
3193 fixImplicitOperands(*CondBr); in insertBranch()
3197 MachineOperand &CondReg = CondBr->getOperand(1); in insertBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td827 let Name = "CondBr"; let PredicateMethod = "isCondBr";