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Searched refs:CondBr (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RedundantCopyElimination.cpp89 bool knownRegValInBlock(MachineInstr &CondBr, MachineBasicBlock *MBB,
120 MachineInstr &CondBr, MachineBasicBlock *MBB, in knownRegValInBlock() argument
122 unsigned Opc = CondBr.getOpcode(); in knownRegValInBlock()
127 MBB == CondBr.getOperand(1).getMBB()) || in knownRegValInBlock()
129 MBB != CondBr.getOperand(1).getMBB())) { in knownRegValInBlock()
130 FirstUse = CondBr; in knownRegValInBlock()
131 KnownRegs.push_back(RegImm(CondBr.getOperand(0).getReg(), 0)); in knownRegValInBlock()
140 AArch64CC::CondCode CC = (AArch64CC::CondCode)CondBr.getOperand(0).getImm(); in knownRegValInBlock()
144 MachineBasicBlock *BrTarget = CondBr.getOperand(1).getMBB(); in knownRegValInBlock()
151 assert(PredMBB == CondBr.getParent() && in knownRegValInBlock()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRedundantCopyElimination.cpp141 MachineBasicBlock::iterator CondBr = PredMBB->getFirstTerminator(); in optimizeBlock() local
142 assert((CondBr->getOpcode() == RISCV::BEQ || in optimizeBlock()
143 CondBr->getOpcode() == RISCV::BNE) && in optimizeBlock()
145 assert(CondBr->getOperand(0).getReg() == TargetReg && "Unexpected register"); in optimizeBlock()
149 CondBr->clearRegisterKills(TargetReg, TRI); in optimizeBlock()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/
H A DHotColdSplitting.cpp115 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in analyzeProfMetadata() local
116 if (!CondBr) in analyzeProfMetadata()
120 if (!extractBranchWeights(*CondBr, TrueWt, FalseWt)) in analyzeProfMetadata()
131 AnnotatedColdBlocks.insert(CondBr->getSuccessor(0)); in analyzeProfMetadata()
134 AnnotatedColdBlocks.insert(CondBr->getSuccessor(1)); in analyzeProfMetadata()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DJumpThreading.cpp149 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in updatePredecessorProfileMetadata() local
150 if (!CondBr) in updatePredecessorProfileMetadata()
154 if (!extractBranchWeights(*CondBr, TrueWeight, FalseWeight)) in updatePredecessorProfileMetadata()
2163 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in maybethreadThroughTwoBasicBlocks() local
2164 if (!CondBr) in maybethreadThroughTwoBasicBlocks()
2238 BasicBlock *SuccBB = CondBr->getSuccessor(PredPredBB == ZeroPred); in maybethreadThroughTwoBasicBlocks()
2297 BranchInst *CondBr = cast<BranchInst>(BB->getTerminator()); in threadThroughTwoBasicBlocks() local
2340 {{DominatorTree::Insert, NewBB, CondBr->getSuccessor(0)}, in threadThroughTwoBasicBlocks()
2341 {DominatorTree::Insert, NewBB, CondBr->getSuccessor(1)}, in threadThroughTwoBasicBlocks()
2892 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in tryToUnfoldSelect() local
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H A DSimpleLoopUnswitch.cpp2727 auto *CondBr = cast<BranchInst>(HeadBB->getTerminator()); in turnSelectIntoBranch() local
2728 BasicBlock *ThenBB = CondBr->getSuccessor(0), in turnSelectIntoBranch()
2729 *TailBB = CondBr->getSuccessor(1); in turnSelectIntoBranch()
2745 return CondBr; in turnSelectIntoBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp718 for (auto *CondBr : CondBrs) in tracePredStateThroughCFG() local
719 ++SuccCounts[CondBr->getOperand(0).getMBB()]; in tracePredStateThroughCFG()
785 for (auto *CondBr : CondBrs) { in tracePredStateThroughCFG() local
786 MachineBasicBlock &Succ = *CondBr->getOperand(0).getMBB(); in tracePredStateThroughCFG()
789 X86::CondCode Cond = X86::getCondFromBranch(*CondBr); in tracePredStateThroughCFG()
793 BuildCheckingBlockForSuccAndConds(MBB, Succ, SuccCount, CondBr, UncondBr, in tracePredStateThroughCFG()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanRecipes.cpp549 BranchInst *CondBr = State.Builder.CreateCondBr(Cond, IRBB, SecondIRSucc); in createCondBranch() local
551 CondBr->setSuccessor(0, nullptr); in createCondBranch()
553 return CondBr; in createCondBranch()
2997 auto CondBr = in execute() local
2999 CondBr->setSuccessor(0, nullptr); in execute()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp3236 MachineInstr *CondBr = in insertBranch() local
3241 preserveCondRegFlags(CondBr->getOperand(1), Cond[1]); in insertBranch()
3242 fixImplicitOperands(*CondBr); in insertBranch()
3251 MachineInstr *CondBr = in insertBranch() local
3254 fixImplicitOperands(*CondBr); in insertBranch()
3258 MachineOperand &CondReg = CondBr->getOperand(1); in insertBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td828 let Name = "CondBr"; let PredicateMethod = "isCondBr";