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Searched refs:ComplexPattern (Results 1 – 25 of 72) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.td469 def MxCP_ARI : ComplexPattern<iPTR, 1, "SelectARI",
472 def MxCP_ARIPI : ComplexPattern<iPTR, 1, "SelectARIPI",
475 def MxCP_ARIPD : ComplexPattern<iPTR, 1, "SelectARIPD",
478 def MxCP_ARID : ComplexPattern<iPTR, 2, "SelectARID",
482 def MxCP_ARII : ComplexPattern<iPTR, 3, "SelectARII",
486 def MxCP_AL : ComplexPattern<iPTR, 1, "SelectAL",
490 def MxCP_PCD : ComplexPattern<iPTR, 1, "SelectPCD",
494 def MxCP_PCI : ComplexPattern<iPTR, 2, "SelectPCI",
582 MxOperand jOp, ComplexPattern jPat,
585 MxOperand oOp, ComplexPattern oPat,
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H A DM68kInstrBits.td143 MxOperand MEMOpd, ComplexPattern MEMPat> {
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSDNodeProperties.td32 def SDNPWantRoot : SDNodeProperty; // ComplexPattern gets the root of match
33 def SDNPWantParent : SDNodeProperty; // ComplexPattern gets the parent
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenTarget.h234 class ComplexPattern {
243 ComplexPattern(Record *R);
H A DCodeGenTarget.cpp405 ComplexPattern::ComplexPattern(Record *R) { in ComplexPattern() function in ComplexPattern
H A DDAGISelMatcher.h30 class ComplexPattern; variable
710 const ComplexPattern &Pattern;
724 CheckComplexPatMatcher(const ComplexPattern &pattern, unsigned matchnumber, in CheckComplexPatMatcher()
729 const ComplexPattern &getPattern() const { return Pattern; } in getPattern()
H A DCodeGenDAGPatterns.h779 const ComplexPattern *
1104 std::map<Record *, ComplexPattern, LessRecordByID> ComplexPatterns;
1150 const ComplexPattern &getComplexPattern(Record *R) const { in getComplexPattern()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaOperands.td163 def addr_ish1 : ComplexPattern<iPTR, 2, "selectMemRegAddrISH1", [frameindex]>;
164 def addr_ish2 : ComplexPattern<iPTR, 2, "selectMemRegAddrISH2", [frameindex]>;
165 def addr_ish4 : ComplexPattern<iPTR, 2, "selectMemRegAddrISH4", [frameindex]>;
H A DXtensaInstrInfo.td200 ComplexPattern addrOp, Operand memOp>
220 ComplexPattern addrOp, Operand memOp>
247 // add op with mem ComplexPattern is used and the stack address copy
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DDAGISelMatcherEmitter.cpp65 std::vector<const ComplexPattern *> ComplexPatterns;
87 MapVector<const ComplexPattern *, unsigned> ComplexPatternUsage; in MatcherTableEmitter()
117 std::vector<std::pair<const ComplexPattern *, unsigned>> ComplexPatternList( in MatcherTableEmitter()
122 for (const auto &ComplexPattern : ComplexPatternList) in MatcherTableEmitter() local
123 ComplexPatterns.push_back(ComplexPattern.first); in MatcherTableEmitter()
202 unsigned getComplexPat(const ComplexPattern &P) { in getComplexPat()
706 const ComplexPattern &Pattern = CCPM->getPattern(); in EmitMatcher()
1121 const ComplexPattern &P = *ComplexPatterns[i]; in EmitPredicateFunctions()
H A DGlobalISelEmitter.cpp932 const auto &ComplexPattern = ComplexPatternEquivs.find(R); in importComplexPatternOperandMatcher() local
933 if (ComplexPattern == ComplexPatternEquivs.end()) in importComplexPatternOperandMatcher()
937 OM.addPredicate<ComplexPatternOperandMatcher>(OM, *ComplexPattern->second); in importComplexPatternOperandMatcher()
1317 const auto &ComplexPattern = ComplexPatternEquivs.find(ChildRec); in importExplicitUseRenderer() local
1318 if (ComplexPattern == ComplexPatternEquivs.end()) in importExplicitUseRenderer()
1324 *ComplexPattern->second, DstChild.getName(), in importExplicitUseRenderer()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFragments.td360 def addr : ComplexPattern<iPTR, 5, "selectAddr", [], [SDNPWantParent]>;
361 def lea32addr : ComplexPattern<i32, 5, "selectLEAAddr",
365 def lea64_32addr : ComplexPattern<i32, 5, "selectLEA64_32Addr",
370 def tls32addr : ComplexPattern<i32, 5, "selectTLSADDRAddr",
373 def tls32baseaddr : ComplexPattern<i32, 5, "selectTLSADDRAddr",
376 def lea64addr : ComplexPattern<i64, 5, "selectLEAAddr",
380 def tls64addr : ComplexPattern<i64, 5, "selectTLSADDRAddr",
383 def tls64baseaddr : ComplexPattern<i64, 5, "selectTLSADDRAddr",
386 def vectoraddr : ComplexPattern<iPTR, 5, "selectVectorAddr", [],[SDNPWantParent]>;
390 def relocImm : ComplexPattern<iAny, 1, "selectRelocImm",
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.td1376 def DS1Addr1Offset : ComplexPattern<iPTR, 2, "SelectDS1Addr1Offset">;
1377 def DS64Bit4ByteAligned : ComplexPattern<iPTR, 3, "SelectDS64Bit4ByteAligned">;
1378 def DS128Bit8ByteAligned : ComplexPattern<iPTR, 3, "SelectDS128Bit8ByteAligned">;
1380 def MOVRELOffset : ComplexPattern<iPTR, 2, "SelectMOVRELOffset">;
1382 def VOP3Mods0 : ComplexPattern<untyped, 4, "SelectVOP3Mods0">;
1385 def VOP3Mods : ComplexPattern<untyped, 2, "SelectVOP3Mods">;
1390 def VOP3ModsNonCanonicalizing : ComplexPattern<untyped, 2,
1393 def VOP3NoMods : ComplexPattern<untyped, 1, "SelectVOP3NoMods">;
1395 def VOP3OMods : ComplexPattern<untyped, 3, "SelectVOP3OMods">;
1397 def VOP3PMods : ComplexPattern<untyped, 2, "SelectVOP3PMods">;
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H A DVINTERPInstructions.td147 list<ComplexPattern> pat> : GCNPat <
162 ValueType dst_type, list<ComplexPattern> high_pat> {
H A DAMDGPUGISel.td16 def sd_vsrc0 : ComplexPattern<i32, 1, "">;
21 def sd_vcsrc : ComplexPattern<i32, 1, "">;
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZb.td239 def sh1add_op : ComplexPattern<XLenVT, 1, "selectSHXADDOp<1>", [], [], 6>;
240 def sh2add_op : ComplexPattern<XLenVT, 1, "selectSHXADDOp<2>", [], [], 6>;
241 def sh3add_op : ComplexPattern<XLenVT, 1, "selectSHXADDOp<3>", [], [], 6>;
243 def sh1add_uw_op : ComplexPattern<XLenVT, 1, "selectSHXADD_UWOp<1>", [], [], 6>;
244 def sh2add_uw_op : ComplexPattern<XLenVT, 1, "selectSHXADD_UWOp<2>", [], [], 6>;
245 def sh3add_uw_op : ComplexPattern<XLenVT, 1, "selectSHXADD_UWOp<3>", [], [], 6>;
667 defvar pat = !cast<ComplexPattern>("sh"#i#"add_op");
668 // More complex cases use a ComplexPattern.
709 // More complex cases use a ComplexPattern.
711 defvar pat = !cast<ComplexPattern>("sh"#i#"add_uw_op");
H A DRISCVInstrInfo.td400 def FrameAddrRegImm : ComplexPattern<iPTR, 2, "SelectFrameAddrRegImm",
402 def AddrRegImm : ComplexPattern<iPTR, 2, "SelectAddrRegImm">;
1209 def sexti16 : ComplexPattern<XLenVT, 1, "selectSExtBits<16>">;
1210 def sexti16i32 : ComplexPattern<i32, 1, "selectSExtBits<16>">;
1211 def sexti32 : ComplexPattern<i64, 1, "selectSExtBits<32>">;
1215 def zexti32 : ComplexPattern<i64, 1, "selectZExtBits<32>">;
1216 def zexti16 : ComplexPattern<XLenVT, 1, "selectZExtBits<16>">;
1217 def zexti16i32 : ComplexPattern<i32, 1, "selectZExtBits<16>">;
1218 def zexti8 : ComplexPattern<XLenVT, 1, "selectZExtBits<8>">;
1219 def zexti8i32 : ComplexPattern<i32, 1, "selectZExtBits<8>">;
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H A DRISCVInstrInfoVVLPatterns.td601 def SplatPat : ComplexPattern<vAny, 1, "selectVSplat", [], [], 1>;
602 def SplatPat_simm5 : ComplexPattern<vAny, 1, "selectVSplatSimm5", [], [], 3>;
603 def SplatPat_uimm5 : ComplexPattern<vAny, 1, "selectVSplatUimmBits<5>", [], [], 3>;
604 def SplatPat_uimm6 : ComplexPattern<vAny, 1, "selectVSplatUimmBits<6>", [], [], 3>;
606 : ComplexPattern<vAny, 1, "selectVSplatSimm5Plus1", [], [], 3>;
608 : ComplexPattern<vAny, 1, "selectVSplatSimm5Plus1NonZero", [], [], 3>;
613 : ComplexPattern<vAny, 1, "selectLow8BitsVSplat", [], [], 2>;
620 def sew8simm5 : ComplexPattern<XLenVT, 1, "selectRVVSimm5<8>", []>;
621 def sew16simm5 : ComplexPattern<XLenVT, 1, "selectRVVSimm5<16>", []>;
622 def sew32simm5 : ComplexPattern<XLenVT, 1, "selectRVVSimm5<32>", []>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DSMEInstrFormats.td13 def imm_to_tile8 : ComplexPattern<i32, 1, "ImmToReg<AArch64::ZAB0, 0>", []>;
14 def imm_to_tile16 : ComplexPattern<i32, 1, "ImmToReg<AArch64::ZAH0, 1>", []>;
15 def imm_to_tile32 : ComplexPattern<i32, 1, "ImmToReg<AArch64::ZAS0, 3>", []>;
16 def imm_to_tile64 : ComplexPattern<i32, 1, "ImmToReg<AArch64::ZAD0, 7>", []>;
17 def imm_to_tile128 : ComplexPattern<i32, 1, "ImmToReg<AArch64::ZAQ0, 15>", []>;
18 def imm_to_zt : ComplexPattern<i32, 1, "ImmToReg<AArch64::ZT0, 0>", []>;
20 def tileslice8 : ComplexPattern<i32 , 2, "SelectSMETileSlice<15, 1>", []>;
21 def tileslice16 : ComplexPattern<i32 , 2, "SelectSMETileSlice<7, 1>", []>;
22 def tileslice32 : ComplexPattern<i32 , 2, "SelectSMETileSlice<3, 1>", []>;
23 def tileslice64 : ComplexPattern<i32 , 2, "SelectSMETileSlice<1, 1>", []>;
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H A DSVEInstrFormats.td247 def SVEAddSubImm8Pat : ComplexPattern<i32, 2, "SelectSVEAddSubImm<MVT::i8>", []>;
248 def SVEAddSubImm16Pat : ComplexPattern<i32, 2, "SelectSVEAddSubImm<MVT::i16>", []>;
249 def SVEAddSubImm32Pat : ComplexPattern<i32, 2, "SelectSVEAddSubImm<MVT::i32>", []>;
250 def SVEAddSubImm64Pat : ComplexPattern<i64, 2, "SelectSVEAddSubImm<MVT::i64>", []>;
252 def SVEAddSubSSatNegImm8Pat : ComplexPattern<i32, 2, "SelectSVEAddSubSSatImm<MVT::i8, true>", []>;
253 def SVEAddSubSSatNegImm16Pat : ComplexPattern<i32, 2, "SelectSVEAddSubSSatImm<MVT::i16, true>", []>;
254 def SVEAddSubSSatNegImm32Pat : ComplexPattern<i32, 2, "SelectSVEAddSubSSatImm<MVT::i32, true>", []>;
255 def SVEAddSubSSatNegImm64Pat : ComplexPattern<i64, 2, "SelectSVEAddSubSSatImm<MVT::i64, true>", []>;
257 def SVEAddSubSSatPosImm8Pat : ComplexPattern<i32, 2, "SelectSVEAddSubSSatImm<MVT::i8, false>", []>;
258 def SVEAddSubSSatPosImm16Pat : ComplexPattern<i32, 2, "SelectSVEAddSubSSatImm<MVT::i16, false>", []…
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/
H A DSelectionDAGCompat.td268 // Specifies the GlobalISel equivalents for SelectionDAG's ComplexPattern.
270 class GIComplexPatternEquiv<ComplexPattern seldag> {
271 ComplexPattern SelDAGEquivalent = seldag;
H A DTarget.td29 // Defines a matcher for complex operands. This is analogous to ComplexPattern
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrMemory.td33 def AddrOps32 : ComplexPattern<i32, 2, "SelectAddrOperands32">;
34 def AddrOps64 : ComplexPattern<i64, 2, "SelectAddrOperands64">;
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrThumb.td186 ComplexPattern<i32, 2, "SelectThumbAddrModeRR", []> {
199 ComplexPattern<i32, 2, "SelectThumbAddrModeRRSext", []> {
215 ComplexPattern<i32, 2, "SelectThumbAddrModeRI5S1", []> {
223 ComplexPattern<i32, 2, "SelectThumbAddrModeRI5S2", []> {
231 ComplexPattern<i32, 2, "SelectThumbAddrModeRI5S4", []> {
243 ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S4", []> {
255 ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S2", []> {
267 ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S1", []> {
281 ComplexPattern<i32, 2, "SelectThumbAddrModeSP", []> {
291 def AddLikeOrOp : ComplexPattern<i32, 1, "SelectAddLikeOr", [],
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormatsF1.td220 def Mem8SL2 : Operand<iPTR>, ComplexPattern<iPTR, 2, "SelectAddrRegImm8", []> {
226 def FRRS : Operand<iPTR>, ComplexPattern<iPTR, 3, "SelectAddrRegReg", []> {

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