Searched refs:CompIdx (Results 1 – 4 of 4) sorted by relevance
79 for (auto CompIdx : VOPD::COMPONENTS) { in doReplace() local80 auto MCOprIdx = InstInfo[CompIdx].getIndexOfDstInMCOperands(); in doReplace()81 VOPDInst.add(MI[CompIdx]->getOperand(MCOprIdx)); in doReplace()94 for (auto CompIdx : VOPD::COMPONENTS) { in doReplace() local95 auto CompSrcOprNum = InstInfo[CompIdx].getCompSrcOperandsNum(); in doReplace()96 bool IsVOP3 = SII->isVOP3(*MI[CompIdx]); in doReplace()98 if (AMDGPU::hasNamedOperand(VOPDOpc, Mods[CompIdx][CompSrcIdx])) { in doReplace()100 SII->getNamedOperand(*MI[CompIdx], SrcMods[CompSrcIdx]); in doReplace()104 InstInfo[CompIdx].getIndexOfSrcInMCOperands(CompSrcIdx, IsVOP3); in doReplace()105 VOPDInst.add(MI[CompIdx]->getOperand(MCOprIdx)); in doReplace()[all …]
88 for (auto CompIdx : VOPD::COMPONENTS) { in checkVOPDRegConstraints() local89 const MachineInstr &MI = (CompIdx == VOPD::X) ? FirstMI : SecondMI; in checkVOPDRegConstraints()103 if (InstInfo[CompIdx].hasMandatoryLiteral()) { in checkVOPDRegConstraints()107 auto CompOprIdx = InstInfo[CompIdx].getMandatoryLiteralCompOperandIndex(); in checkVOPDRegConstraints()
929 InstInfo::getRegIndices(unsigned CompIdx, in getRegIndices() argument932 assert(CompIdx < COMPONENTS_NUM); in getRegIndices()934 const auto &Comp = CompInfo[CompIdx]; in getRegIndices()937 RegIndices[DST] = GetRegIdx(CompIdx, Comp.getIndexOfDstInMCOperands()); in getRegIndices()943 ? GetRegIdx(CompIdx, in getRegIndices()
9469 for (auto CompIdx : VOPD::COMPONENTS) { in cvtVOPD() local9470 addOp(InstInfo[CompIdx].getIndexOfDstInParsedOperands()); in cvtVOPD()9473 for (auto CompIdx : VOPD::COMPONENTS) { in cvtVOPD() local9474 const auto &CInfo = InstInfo[CompIdx]; in cvtVOPD()9475 auto CompSrcOperandsNum = InstInfo[CompIdx].getCompParsedSrcOperandsNum(); in cvtVOPD()