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Searched refs:CombineTo (Results 1 – 13 of 13) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp573 return TLO.CombineTo(Op, NewOp); in ShrinkDemandedConstant()
641 return TLO.CombineTo(Op, Z); in ShrinkDemandedOp()
1211 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedBits()
1223 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedBits()
1287 return TLO.CombineTo(Op, Vec); in SimplifyDemandedBits()
1348 return TLO.CombineTo(Op, NewOp); in SimplifyDemandedBits()
1375 return TLO.CombineTo(Op, NewOp); in SimplifyDemandedBits()
1438 return TLO.CombineTo(Op, NewOp); in SimplifyDemandedBits()
1457 return TLO.CombineTo(Op, Op0); in SimplifyDemandedBits()
1473 return TLO.CombineTo(Op, Xor); in SimplifyDemandedBits()
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H A DDAGCombiner.cpp318 SDValue CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
322 SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true) { in CombineTo() function in __anon666e37100111::DAGCombiner
323 return CombineTo(N, &Res, 1, AddTo); in CombineTo()
327 SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1, in CombineTo() function in __anon666e37100111::DAGCombiner
330 return CombineTo(N, To, 2, AddTo); in CombineTo()
930 CombineTo(SDNode *N, ArrayRef<SDValue> To, bool AddTo) { in CombineTo() function in TargetLowering::DAGCombinerInfo
931 return ((DAGCombiner*)DC)->CombineTo(N, &To[0], To.size(), AddTo); in CombineTo()
935 CombineTo(SDNode *N, SDValue Res, bool AddTo) { in CombineTo() function in TargetLowering::DAGCombinerInfo
936 return ((DAGCombiner*)DC)->CombineTo(N, Res, AddTo); in CombineTo()
940 CombineTo(SDNode *N, SDValue Res0, SDValue Res1, bool AddTo) { in CombineTo() function in TargetLowering::DAGCombinerInfo
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp38439 return TLO.CombineTo(Op, NewOp); in targetShrinkDemandedConstant()
38488 return TLO.CombineTo(Op, NewOp); in targetShrinkDemandedConstant()
42234 DCI.CombineTo(N.getNode(), Movddup); in combineTargetShuffle()
42336 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
42343 DCI.CombineTo(LN, Scl, BcastLd.getValue(1)); in combineTargetShuffle()
42367 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
42384 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
42412 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
42429 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
42447 DCI.CombineTo(N.getNode(), BcastLd); in combineTargetShuffle()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4099 bool CombineTo(SDValue O, SDValue N) { in CombineTo() function
4397 LLVM_ABI SDValue CombineTo(SDNode *N, ArrayRef<SDValue> To,
4399 LLVM_ABI SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true);
4400 LLVM_ABI SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1,
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp13226 return DCI.CombineTo(N, SDValue(N, 0), LHS->getOperand(2)); in PerformAddcSubcCombine()
14373 DCI.CombineTo(N, Res, false); in PerformMULCombine()
14651 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI()
14678 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI()
14695 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI()
14716 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI()
15136 return DCI.CombineTo(N, InDouble.getOperand(0), InDouble.getOperand(1)); in PerformVMOVRRDCombine()
15165 SDValue Result = DCI.CombineTo(N, NewLD1, NewLD2); in PerformVMOVRRDCombine()
15649 DCI.CombineTo(OtherExt.getNode(), SDValue(VMOVRRD.getNode(), 1)); in PerformExtractEltToVMOVRRD()
16180 DCI.CombineTo(N, NewResults); in TryCombineBaseUpdate()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp7698 DCI.CombineTo(N0.getNode(), TruncSelect); in combineZERO_EXTEND()
7949 DCI.CombineTo(HiPart, EltLoad, true); in combineLOAD()
7959 DCI.CombineTo(LoPart, EltLoad, true); in combineLOAD()
8306 DCI.CombineTo(N, ESLoad); in combineVECTOR_SHUFFLE()
8310 DCI.CombineTo(Load.getNode(), ESLoad, ESLoad.getValue(1)); in combineVECTOR_SHUFFLE()
8589 DCI.CombineTo(N, ResVal); in combineBSWAP()
8593 DCI.CombineTo(Load.getNode(), ResVal, BSLoad.getValue(1)); in combineBSWAP()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp2496 return TLO.CombineTo(Op, New); in optimizeLogicalImm()
18247 DCI.CombineTo(Extracts[0], R.getValue(0)); in performActiveLaneMaskCombine()
18248 DCI.CombineTo(Extracts[1], R.getValue(1)); in performActiveLaneMaskCombine()
18258 DCI.CombineTo(Extracts[I], R.getValue(0)); in performActiveLaneMaskCombine()
18259 DCI.CombineTo(Extracts[I + 1], R.getValue(1)); in performActiveLaneMaskCombine()
23566 DCI.CombineTo(LD, NewResults); in performPostLD1Combine()
23567 DCI.CombineTo(N, SDValue(UpdN.getNode(), 0)); // Dup/Inserted Result in performPostLD1Combine()
23568 DCI.CombineTo(User, SDValue(UpdN.getNode(), 1)); // Write back register in performPostLD1Combine()
24469 DCI.CombineTo(N, NewResults); in performNEONPostLDSTCombine()
24470 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in performNEONPostLDSTCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp5776 return DCI.CombineTo(N, Op0.getOperand(0), Op0.getOperand(1)); in performSPLIT_PAIR_F64Combine()
5781 return DCI.CombineTo(N, Lo, Hi); in performSPLIT_PAIR_F64Combine()
5791 return DCI.CombineTo(N, Lo, Hi); in performSPLIT_PAIR_F64Combine()
8558 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, SDLoc(Op), VT)); in SimplifyDemandedBitsForTargetNode()
8585 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc)); in SimplifyDemandedBitsForTargetNode()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp16661 return DCI.CombineTo(N, SDValue(N, 0), LHS->getOperand(2)); in DAGCombineAddc()
16820 ? DCI.CombineTo(N, NewST, /*AddTo=*/false) in PerformDAGCombine()
16821 : DCI.CombineTo(N, NewST, NewST.getValue(1), /*AddTo=*/false); in PerformDAGCombine()
16943 DCI.CombineTo(Bitcast2, FloatLoad); in PerformDAGCombine()
16944 DCI.CombineTo(Bitcast, FloatLoad2); in PerformDAGCombine()
17081 DCI.CombineTo(N, Perm, TF); in PerformDAGCombine()
17246 DCI.CombineTo(N, ResVal); in PerformDAGCombine()
17250 DCI.CombineTo(Load.getNode(), ResVal, BSLoad.getValue(1)); in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp15770 DCI.CombineTo(N, ZextLoad); in reduceANDOfAtomicLoad()
19686 return DCI.CombineTo(N, Op0.getOperand(0), Op0.getOperand(1)); in PerformDAGCombine()
19691 return DCI.CombineTo(N, Lo, Hi); in PerformDAGCombine()
19701 return DCI.CombineTo(N, Lo, Hi); in PerformDAGCombine()
19720 return DCI.CombineTo(N, Lo, NewHi); in PerformDAGCombine()
19725 return DCI.CombineTo(N, Lo, NewHi); in PerformDAGCombine()
19906 DCI.CombineTo(N, Res); in PerformDAGCombine()
20865 return TLO.CombineTo(Op, NewOp); in targetShrinkDemandedConstant()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp3912 DCI.CombineTo(N, BC, NewLoad.getValue(1)); in performLoadCombine()
4617 DCI.CombineTo(N, Lo, Hi); in performMulLoHiCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp5312 DCI.CombineTo(N, Val, AddTo); in PerformANDCombine()
/freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/
H A DDemangleTestCases.inc14405 …6vectorINS_7SDValueESaIS5_EEb", "llvm::TargetLowering::DAGCombinerInfo::CombineTo(llvm::SDNode*, s…
14406 …PN4llvm6SDNodeEPKNS1_7SDValueEjb", "(anonymous namespace)::DAGCombiner::CombineTo(llvm::SDNode*, l…
14407 …eToEPNS_6SDNodeENS_7SDValueEb", "llvm::TargetLowering::DAGCombinerInfo::CombineTo(llvm::SDNode*, l…
14408 …EPNS_6SDNodeENS_7SDValueES4_b", "llvm::TargetLowering::DAGCombinerInfo::CombineTo(llvm::SDNode*, l…