| /freebsd/contrib/llvm-project/clang/lib/Analysis/FlowSensitive/Models/ |
| H A D | UncheckedOptionalAccessModel.cpp | 652 auto *CmpValue = &forceBoolValue(Env, *CmpExpr); in transferOptionalAndOptionalCmp() local
658 CmpValue = &A.makeNot(*CmpValue); in transferOptionalAndOptionalCmp()
659 Env.assume(evaluateEquality(A, *CmpValue, LHasVal->formula(), in transferOptionalAndOptionalCmp()
668 auto *CmpValue = &forceBoolValue(Env, *CmpExpr); in transferOptionalAndValueCmp() local
672 CmpValue = &A.makeNot(*CmpValue); in transferOptionalAndValueCmp()
674 evaluateEquality(A, *CmpValue, HasVal->formula(), A.makeLiteral(true))); in transferOptionalAndValueCmp()
681 auto *CmpValue = &forceBoolValue(Env, *CmpExpr); in transferOptionalAndNulloptCmp() local
685 CmpValue = &A.makeNot(*CmpValue); in transferOptionalAndNulloptCmp()
686 Env.assume(evaluateEquality(A, *CmpValue, HasVal->formula(), in transferOptionalAndNulloptCmp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 100 int64_t &CmpValue) const override;
106 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | LanaiInstrInfo.cpp | 180 int64_t &CmpValue) const { in analyzeCompare()
189 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
195 CmpValue = 0; in analyzeCompare()
286 int64_t /*CmpMask*/, int64_t CmpValue, in optimizeCompareInstr() argument
309 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
332 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &*I)) { in optimizeCompareInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 421 int64_t &CmpValue) const override;
425 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
567 int CmpValue, const MachineRegisterInfo &MRI) const;
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| H A D | AArch64InstrInfo.cpp | 1176 int64_t &CmpValue) const { in analyzeCompare()
1192 CmpValue = 0; in analyzeCompare()
1210 CmpValue = 0; in analyzeCompare()
1219 CmpValue = MI.getOperand(2).getImm(); in analyzeCompare()
1228 CmpValue = AArch64_AM::decodeLogicalImmediate( in analyzeCompare()
1537 int64_t CmpValue, const MachineRegisterInfo *MRI) const { in optimizeCompareInstr() argument
1574 if (CmpValue == 0 && substituteCmpToZero(CmpInstr, SrcReg, *MRI)) in optimizeCompareInstr()
1576 return (CmpValue == 0 || CmpValue == 1) && in optimizeCompareInstr()
1577 removeCmpToZeroOrOne(CmpInstr, SrcReg, CmpValue, *MRI); in optimizeCompareInstr()
1846 int CmpValue, const TargetRegisterInfo &TRI, in canCmpInstrBeRemoved() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 564 int64_t &CmpValue) const override;
570 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | X86InstrInfo.cpp | 4767 int64_t &CmpValue) const { in analyzeCompare()
4779 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
4781 CmpMask = CmpValue = 0; in analyzeCompare()
4792 CmpValue = 0; in analyzeCompare()
4801 CmpValue = 0; in analyzeCompare()
4811 CmpValue = MI.getOperand(2).getImm(); in analyzeCompare()
4813 CmpMask = CmpValue = 0; in analyzeCompare()
4823 CmpValue = 0; in analyzeCompare()
4835 CmpValue = 0; in analyzeCompare()
5205 int64_t CmpValue, in optimizeCompareInstr() argument
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 671 int64_t CmpMask, CmpValue; in optimizeCmpInstr() local
672 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
678 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 298 int64_t &CmpValue) const override;
305 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | ARMBaseInstrInfo.cpp | 2790 int64_t &CmpValue) const { in analyzeCompare()
2799 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
2807 CmpValue = 0; in analyzeCompare()
2814 CmpValue = 0; in analyzeCompare()
3016 int64_t CmpValue, const MachineRegisterInfo *MRI) const { in optimizeCompareInstr() argument
3057 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
3114 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &Instr, in optimizeCompareInstr()
3303 int64_t CmpMask, CmpValue; in shouldSink() local
3306 analyzeCompare(*Next, SrcReg, SrcReg2, CmpMask, CmpValue) && in shouldSink()
3307 isRedundantFlagInstr(&*Next, SrcReg, SrcReg2, CmpValue, &MI, IsThumb1)) in shouldSink()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 382 int64_t &CmpValue) const override;
385 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | SIInstrInfo.cpp | 9709 int64_t &CmpValue) const { in analyzeCompare()
9735 CmpValue = 0; in analyzeCompare()
9738 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
9758 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
9768 int64_t CmpValue, in optimizeCompareInstr() argument
9773 if (SrcReg2 && !getFoldableImm(SrcReg2, *MRI, CmpValue)) in optimizeCompareInstr()
9776 const auto optimizeCmpAnd = [&CmpInstr, SrcReg, CmpValue, MRI, in optimizeCompareInstr()
9835 if (CmpValue != ExpectedValue) { in optimizeCompareInstr()
9838 IsReversedCC = CmpValue == (ExpectedValue ^ Mask); in optimizeCompareInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 1453 int64_t CmpMask = 0, CmpValue = 0; in loopCountMayWrapOrUnderFlow() local
1455 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2768 int64_t CmpMask, CmpValue; in optimizeCmpPostRA() local
2769 if (!analyzeCompare(CmpMI, SrcReg, SrcReg2, CmpMask, CmpValue)) in optimizeCmpPostRA()
2773 if (CmpValue || !CmpMask || SrcReg2) in optimizeCmpPostRA()
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