| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 750 const auto CmpOpcode = [](auto A, auto B) { return A.Opcode < B.Opcode; }; in getIntrinsicId() local
752 (llvm::sort(ScalarInts, CmpOpcode), true); in getIntrinsicId()
754 (llvm::sort(HvxInts, CmpOpcode), true); in getIntrinsicId()
759 auto FoundScalar = std::lower_bound(BS, ES, Scalar{Opc, 0}, CmpOpcode); in getIntrinsicId()
763 auto FoundHvx = std::lower_bound(BH, EH, Hvx{Opc, 0, 0}, CmpOpcode); in getIntrinsicId()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 967 unsigned CmpOpcode = 0,
973 unsigned CmpOpcode = 0,
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| H A D | PPCISelLowering.cpp | 12864 unsigned CmpOpcode, in EmitAtomicBinary() argument
12906 CmpOpcode ? F->CreateMachineBasicBlock(LLVM_BB) : nullptr; in EmitAtomicBinary()
12909 if (CmpOpcode) in EmitAtomicBinary()
12948 if (CmpOpcode) { in EmitAtomicBinary()
12951 if (CmpOpcode == PPC::CMPW && AtomicSize < 4) { in EmitAtomicBinary()
12955 BuildMI(BB, dl, TII->get(CmpOpcode), CrReg).addReg(ExtReg).addReg(incr); in EmitAtomicBinary()
12957 BuildMI(BB, dl, TII->get(CmpOpcode), CrReg).addReg(dest).addReg(incr); in EmitAtomicBinary()
13039 unsigned BinOpcode, unsigned CmpOpcode, unsigned CmpPred) const { in EmitPartwordAtomicBinary() argument
13052 if (CmpOpcode == PPC::CMPW && !IsSignExtended) { in EmitPartwordAtomicBinary()
13061 return EmitAtomicBinary(MI, BB, is8bit ? 1 : 2, BinOpcode, CmpOpcode, in EmitPartwordAtomicBinary()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 461 CmpConstants(unsigned CmpOpcode, unsigned FlagsOpcode, unsigned SelectOpcode, in CmpConstants()
463 : ComparisonOpcode(CmpOpcode), ReadFlagsOpcode(FlagsOpcode), in CmpConstants()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2209 unsigned CmpOpcode = in X86FastEmitSSESelect() local
2211 Register CmpReg = fastEmitInst_rri(CmpOpcode, VK1, CmpLHSReg, CmpRHSReg, in X86FastEmitSSESelect()
2239 unsigned CmpOpcode = in X86FastEmitSSESelect() local
2244 Register CmpReg = fastEmitInst_rri(CmpOpcode, RC, CmpLHSReg, CmpRHSReg, in X86FastEmitSSESelect()
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| H A D | X86ISelLowering.cpp | 48754 unsigned CmpOpcode = EFLAGS.getOpcode(); in combineSetCCMOVMSK() local
48755 if (CmpOpcode != X86ISD::CMP && CmpOpcode != X86ISD::SUB) in combineSetCCMOVMSK()
48781 bool IsAnyOf = CmpOpcode == X86ISD::CMP && CmpVal.isZero(); in combineSetCCMOVMSK()
48782 bool IsAllOf = (CmpOpcode == X86ISD::SUB || CmpOpcode == X86ISD::CMP) && in combineSetCCMOVMSK()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 1302 unsigned CmpOpcode = in foldExtractedCmps() local
1313 CmpOpcode, I0->getType(), CmpInst::makeCmpResultType(I0->getType()), Pred, in foldExtractedCmps()
1327 CmpOpcode, VecTy, CmpInst::makeCmpResultType(VecTy), Pred, CostKind); in foldExtractedCmps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1905 const unsigned CmpOpcode = CmpInstr.getOpcode(); in canInstrSubstituteCmpInstr() local
1906 if (!isADDSRegImm(CmpOpcode) && !isSUBSRegImm(CmpOpcode)) in canInstrSubstituteCmpInstr()
1996 const unsigned CmpOpcode = CmpInstr.getOpcode(); in canCmpInstrBeRemoved() local
1997 bool IsSubsRegImm = isSUBSRegImm(CmpOpcode); in canCmpInstrBeRemoved()
2000 if (!CmpValue && !IsSubsRegImm && !isADDSRegImm(CmpOpcode)) in canCmpInstrBeRemoved()
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