/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiInstrInfo.h | 99 Register &SrcReg2, int64_t &CmpMask, 106 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
H A D | LanaiInstrInfo.cpp | 179 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument 188 CmpMask = ~0; in analyzeCompare() 194 CmpMask = ~0; in analyzeCompare()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.h | 563 Register &SrcReg2, int64_t &CmpMask, 570 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
H A D | X86InstrInfo.cpp | 4766 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument 4778 CmpMask = ~0; in analyzeCompare() 4781 CmpMask = CmpValue = 0; in analyzeCompare() 4791 CmpMask = 0; in analyzeCompare() 4800 CmpMask = 0; in analyzeCompare() 4810 CmpMask = ~0; in analyzeCompare() 4813 CmpMask = CmpValue = 0; in analyzeCompare() 4822 CmpMask = 0; in analyzeCompare() 4834 CmpMask = ~0; in analyzeCompare() 5204 Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument [all …]
|
H A D | X86ISelLowering.cpp | 25925 SDValue CmpMask = getScalarMaskingNode(Cmp, Mask, SDValue(), in LowerINTRINSIC_WO_CHAIN() local 25931 CmpMask, DAG.getIntPtrConstant(0, dl)); in LowerINTRINSIC_WO_CHAIN() 47046 APInt CmpMask = APInt::getLowBitsSet(32, IsAnyOf ? 0 : BCNumElts); in combineSetCCMOVMSK() local 47049 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK() 47063 APInt CmpMask = APInt::getLowBitsSet(32, IsAnyOf ? 0 : NumElts / 2); in combineSetCCMOVMSK() local 47070 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK() 47146 unsigned CmpMask = IsAnyOf ? 0 : 0xFFFFFFFF; in combineSetCCMOVMSK() local 47154 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.h | 420 Register &SrcReg2, int64_t &CmpMask, 425 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
H A D | AArch64InstrInfo.cpp | 1175 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument 1191 CmpMask = ~0; in analyzeCompare() 1209 CmpMask = ~0; in analyzeCompare() 1218 CmpMask = ~0; in analyzeCompare() 1227 CmpMask = ~0; in analyzeCompare() 1536 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonHardwareLoops.cpp | 474 int64_t CmpImm = 0, CmpMask = 0; in findInductionRegister() local 476 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm); in findInductionRegister() 1453 int64_t CmpMask = 0, CmpValue = 0; in loopCountMayWrapOrUnderFlow() local 1455 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
|
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | PeepholeOptimizer.cpp | 671 int64_t CmpMask, CmpValue; in optimizeCmpInstr() local 672 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr() 678 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 297 Register &SrcReg2, int64_t &CmpMask, 305 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
H A D | ARMBaseInstrInfo.cpp | 2789 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument 2798 CmpMask = ~0; in analyzeCompare() 2806 CmpMask = ~0; in analyzeCompare() 2813 CmpMask = MI.getOperand(1).getImm(); in analyzeCompare() 2826 int CmpMask, bool CommonUse) { in isSuitableForMask() argument 2830 if (CmpMask != MI->getOperand(2).getImm()) in isSuitableForMask() 3015 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument 3022 if (CmpMask != ~0) { in optimizeCompareInstr() 3023 if (!isSuitableForMask(MI, SrcReg, CmpMask, false) || isPredicated(*MI)) { in optimizeCompareInstr() 3031 if (!isSuitableForMask(PotentialAND, SrcReg, CmpMask, true) || in optimizeCompareInstr() [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.h | 381 Register &SrcReg2, int64_t &CmpMask, 385 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
H A D | AMDGPUInstCombineIntrinsic.cpp | 624 Value *CmpMask = IC.Builder.CreateICmpNE( in instCombineIntrinsic() local 626 return IC.replaceInstUsesWith(II, CmpMask); in instCombineIntrinsic()
|
H A D | SIInstrInfo.cpp | 9708 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument 9742 CmpMask = ~0; in analyzeCompare() 9759 CmpMask = ~0; in analyzeCompare() 9767 Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
|
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 2768 int64_t CmpMask, CmpValue; in optimizeCmpPostRA() local 2769 if (!analyzeCompare(CmpMI, SrcReg, SrcReg2, CmpMask, CmpValue)) in optimizeCmpPostRA() 2773 if (CmpValue || !CmpMask || SrcReg2) in optimizeCmpPostRA()
|