| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 101 Register &SrcReg2, int64_t &CmpMask,
108 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | LanaiInstrInfo.cpp | 180 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
189 CmpMask = ~0; in analyzeCompare()
195 CmpMask = ~0; in analyzeCompare()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 611 Register &SrcReg2, int64_t &CmpMask,
618 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | X86InstrInfo.cpp | 4835 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
4847 CmpMask = ~0; in analyzeCompare()
4850 CmpMask = CmpValue = 0; in analyzeCompare()
4860 CmpMask = 0; in analyzeCompare()
4869 CmpMask = 0; in analyzeCompare()
4879 CmpMask = ~0; in analyzeCompare()
4882 CmpMask = CmpValue = 0; in analyzeCompare()
4891 CmpMask = 0; in analyzeCompare()
4903 CmpMask = ~0; in analyzeCompare()
5274 Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
[all …]
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| H A D | X86ISelLowering.cpp | 26781 SDValue CmpMask = getScalarMaskingNode(Cmp, Mask, SDValue(), in LowerINTRINSIC_WO_CHAIN() local
26786 DAG.getConstant(0, dl, MVT::v8i1), CmpMask, in LowerINTRINSIC_WO_CHAIN()
48810 APInt CmpMask = APInt::getLowBitsSet(32, IsAnyOf ? 0 : BCNumElts); in combineSetCCMOVMSK() local
48813 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK()
48827 APInt CmpMask = APInt::getLowBitsSet(32, IsAnyOf ? 0 : NumElts / 2); in combineSetCCMOVMSK() local
48834 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK()
48910 unsigned CmpMask = IsAnyOf ? 0 : 0xFFFFFFFF; in combineSetCCMOVMSK() local
48918 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 426 Register &SrcReg2, int64_t &CmpMask,
431 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | AArch64InstrInfo.cpp | 1280 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
1300 CmpMask = ~0; in analyzeCompare()
1323 CmpMask = ~0; in analyzeCompare()
1332 CmpMask = ~0; in analyzeCompare()
1341 CmpMask = ~0; in analyzeCompare()
1658 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 467 int64_t CmpImm = 0, CmpMask = 0; in findInductionRegister() local
469 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm); in findInductionRegister()
1490 int64_t CmpMask = 0, CmpValue = 0; in loopCountMayWrapOrUnderFlow() local
1492 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 294 Register &SrcReg2, int64_t &CmpMask,
302 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | ARMBaseInstrInfo.cpp | 2632 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
2641 CmpMask = ~0; in analyzeCompare()
2649 CmpMask = ~0; in analyzeCompare()
2656 CmpMask = MI.getOperand(1).getImm(); in analyzeCompare()
2669 int CmpMask, bool CommonUse) { in isSuitableForMask() argument
2673 if (CmpMask != MI->getOperand(2).getImm()) in isSuitableForMask()
2858 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
2865 if (CmpMask != ~0) { in optimizeCompareInstr()
2866 if (!isSuitableForMask(MI, SrcReg, CmpMask, false) || isPredicated(*MI)) { in optimizeCompareInstr()
2874 if (!isSuitableForMask(PotentialAND, SrcReg, CmpMask, true) || in optimizeCompareInstr()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 945 int64_t CmpMask, CmpValue; in optimizeCmpInstr() local
946 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
952 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 391 Register &SrcReg2, int64_t &CmpMask,
395 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | AMDGPUInstCombineIntrinsic.cpp | 827 Value *CmpMask = IC.Builder.CreateICmpNE( in instCombineIntrinsic() local
829 return IC.replaceInstUsesWith(II, CmpMask); in instCombineIntrinsic()
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| H A D | SIInstrInfo.cpp | 10179 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
10213 CmpMask = ~0; in analyzeCompare()
10230 CmpMask = ~0; in analyzeCompare()
10238 Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2791 int64_t CmpMask, CmpValue; in optimizeCmpPostRA() local
2792 if (!analyzeCompare(CmpMI, SrcReg, SrcReg2, CmpMask, CmpValue)) in optimizeCmpPostRA()
2796 if (CmpValue || !CmpMask || SrcReg2) in optimizeCmpPostRA()
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