Searched refs:CastVT (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4630 EVT CastVT = in LowerVectorXRINT() local
4635 SDValue FOp = DAG.getNode(ISD::FRINT, DL, CastVT, Src); in LowerVectorXRINT()
4659 EVT CastVT = getPromotedVTForPredicate(InVT); in LowerVectorINT_TO_FP() local
4660 In = DAG.getNode(CastOpc, dl, CastVT, In); in LowerVectorINT_TO_FP()
4691 MVT CastVT = in LowerVectorINT_TO_FP() local
4695 In = DAG.getNode(Opc, dl, {CastVT, MVT::Other}, in LowerVectorINT_TO_FP()
4701 In = DAG.getNode(Opc, dl, CastVT, In); in LowerVectorINT_TO_FP()
4708 EVT CastVT = VT.changeVectorElementTypeToInteger(); in LowerVectorINT_TO_FP() local
4709 In = DAG.getNode(CastOpc, dl, CastVT, In); in LowerVectorINT_TO_FP()
12667 EVT CastVT = VT.getHalfNumVectorElementsVT(*DAG.getContext()); in tryFormConcatFromShuffle() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 2979 EVT CastVT = CastVal.getValueType(); in BitcastToInt_ATOMIC_SWAP() local
2982 = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, CastVT, in BitcastToInt_ATOMIC_SWAP()
2983 DAG.getVTList(CastVT, MVT::Other), in BitcastToInt_ATOMIC_SWAP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 12669 MVT CastVT = MVT::getVectorVT(VT.getVectorElementType(), NumSrcElts); in lowerShuffleAsBroadcast() local
12670 return DAG.getNode(Opcode, DL, VT, DAG.getBitcast(CastVT, V)); in lowerShuffleAsBroadcast()
17880 MVT CastVT = MVT::getVectorVT(MVT::i8, NumElts * 2); in LowerVSELECT() local
17881 Cond = DAG.getBitcast(CastVT, Cond); in LowerVSELECT()
17882 LHS = DAG.getBitcast(CastVT, LHS); in LowerVSELECT()
17883 RHS = DAG.getBitcast(CastVT, RHS); in LowerVSELECT()
17884 SDValue Select = DAG.getNode(ISD::VSELECT, dl, CastVT, Cond, LHS, RHS); in LowerVSELECT()
22124 EVT CastVT = VecVT; in combineVectorSizedSetCCEquality() local
22131 CastVT = VecVT; in combineVectorSizedSetCCEquality()
22135 CastVT = OpSize == 512 ? VecVT in combineVectorSizedSetCCEquality()
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| H A D | X86InstrAVX512.td | 1701 X86VectorVTInfo CastVT> {
1705 (CastVT.VT _.RC:$src1))),
1707 (_.VT (bitconvert (CastVT.VT _.RC:$src1))))),
1713 (CastVT.VT _.RC:$src1))),
1715 (_.VT (bitconvert (CastVT.VT _.RC:$src1))))),
1720 (IdxVT.VT (bitconvert (CastVT.VT _.RC:$src1))),
1722 (_.VT (bitconvert (CastVT.VT _.RC:$src1))))),
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 6004 EVT CastVT = getEquivalentMemType(*DAG.getContext(), LoadVT); in lowerIntrinsicLoad() local
6005 SDVTList VTList = DAG.getVTList(CastVT, MVT::Other); in lowerIntrinsicLoad()
6006 SDValue MemNode = getMemIntrinsicNode(Opc, DL, VTList, Ops, CastVT, in lowerIntrinsicLoad()
7756 static SDValue padEltsToUndef(SelectionDAG &DAG, const SDLoc &DL, EVT CastVT, in padEltsToUndef() argument
7771 return DAG.getBuildVector(CastVT, DL, Elts); in padEltsToUndef()
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