/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SwitchLoweringUtils.h | 109 struct CaseBlock { struct 135 /// The debug location of the instruction this CaseBlock was argument 144 CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs, argument 154 CaseBlock(CmpInst::Predicate pred, bool nocmp, const Value *cmplhs, argument 264 /// Vector of CaseBlock structures used to communicate SwitchInst code 266 std::vector<CaseBlock> SwitchCases; 111 PredInfoPairCaseBlock global() argument
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/freebsd/sys/contrib/dev/acpica/compiler/ |
H A D | asltransform.c | 625 ACPI_PARSE_OBJECT *CaseBlock = NULL; in TrDoSwitch() local 700 CaseBlock = CaseOp->Asl.Child->Asl.Next; in TrDoSwitch() 762 NewOp2->Asl.Next = CaseBlock; in TrDoSwitch() 789 Predicate->Asl.Next = CaseBlock; in TrDoSwitch()
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/freebsd/contrib/llvm-project/llvm/lib/FuzzMutate/ |
H A D | IRMutator.cpp | 486 BasicBlock *CaseBlock = BasicBlock::Create(C, "SW_C", F); in mutate() local 488 Switch->addCase(OnValue, CaseBlock); in mutate() 489 Blocks.push_back(CaseBlock); in mutate()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | IRTranslator.h | 362 bool shouldEmitAsBranches(const std::vector<SwitchCG::CaseBlock> &Cases); 390 void emitSwitchCase(SwitchCG::CaseBlock &CB, MachineBasicBlock *SwitchBB,
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.h | 404 bool ShouldEmitAsBranches(const std::vector<SwitchCG::CaseBlock> &Cases); 522 void visitSwitchCase(SwitchCG::CaseBlock &CB, MachineBasicBlock *SwitchBB);
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H A D | SelectionDAGBuilder.cpp | 2462 CaseBlock CB(Condition, BOp->getOperand(0), BOp->getOperand(1), nullptr, in EmitBranchForMergedCondition() 2471 CaseBlock CB(Opc, Cond, ConstantInt::getTrue(*DAG.getContext()), in EmitBranchForMergedCondition() 2753 SelectionDAGBuilder::ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases) { in ShouldEmitAsBranches() 2875 CaseBlock CB(ISD::SETEQ, CondVal, ConstantInt::getTrue(*DAG.getContext()), in visitBr() 2885 void SelectionDAGBuilder::visitSwitchCase(CaseBlock &CB, in visitSwitchCase() 12152 CaseBlock CB(CC, LHS, RHS, MHS, I->MBB, Fallthrough, CurMBB, in lowerWorkItem() 12227 CaseBlock CB(ISD::SETLT, Cond, Pivot, nullptr, LeftMBB, RightMBB, W.MBB, in splitWorkItem()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | IRTranslator.cpp | 398 SwitchCG::CaseBlock CB(Condition, false, BOp->getOperand(0), in emitBranchForMergedCondition() 407 SwitchCG::CaseBlock CB( in emitBranchForMergedCondition() 546 const std::vector<SwitchCG::CaseBlock> &Cases) { in shouldEmitAsBranches() 654 SwitchCG::CaseBlock CB(CmpInst::ICMP_EQ, false, CondVal, in translateBr() 828 CaseBlock CB(ICmpInst::Predicate::ICMP_SLT, false, Cond, Pivot, nullptr, in splitWorkItem() 897 void IRTranslator::emitSwitchCase(SwitchCG::CaseBlock &CB, in emitSwitchCase() 1075 CaseBlock CB(Pred, FallthroughUnreachable, LHS, RHS, MHS, I->MBB, Fallthrough, in lowerSwitchRangeWorkItem()
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/freebsd/contrib/llvm-project/clang/lib/Analysis/ |
H A D | CFG.cpp | 4505 CFGBlock *CaseBlock = Block; in VisitCaseStmt() local 4506 if (!CaseBlock) in VisitCaseStmt() 4507 CaseBlock = createBlock(); in VisitCaseStmt() 4511 CaseBlock->setLabel(CS); in VisitCaseStmt() 4519 addSuccessor(SwitchTerminatedBlock, CaseBlock, in VisitCaseStmt() 4527 addSuccessor(LastBlock, CaseBlock); in VisitCaseStmt() 4531 Succ = CaseBlock; in VisitCaseStmt()
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