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Searched refs:CR4 (Results 1 – 11 of 11) sorted by relevance

/freebsd/sys/dev/xdma/controller/
H A Dpl330.h73 #define CR4 0xE10 /* Configuration Register 4 */ macro
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeViewRegisters.def36 #pragma push_macro("CR4")
99 CV_REGISTER(CR4, 84)
367 #pragma pop_macro("CR4")
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.h42 Reg = PPC::CR4; in getCRFromCRBit()
H A DPPCCallingConv.td302 R28, R29, R30, R31, CR2, CR3, CR4
326 F27, F28, F29, F30, F31, CR2, CR3, CR4
336 F27, F28, F29, F30, F31, CR2, CR3, CR4
H A DPPCFrameLowering.cpp1202 if (isSVR4ABI && isPPC64 && (PPC::CR2 <= Reg && Reg <= PPC::CR4)) { in emitPrologue()
2060 SavedRegs.test(PPC::CR4))) { in determineCalleeSaves()
2443 bool IsCRField = PPC::CR2 <= Reg && Reg <= PPC::CR4; in spillCalleeSavedRegisters()
2558 MBB.insert(MI, BuildMI(*MF, DL, TII.get(RestoreOp), PPC::CR4) in restoreCRs()
2602 return PPC::CR2 == Reg || Reg == PPC::CR3 || Reg == PPC::CR4; in isCalleeSavedCR()
2646 } else if (Reg == PPC::CR4) { in restoreCalleeSavedRegisters()
H A DPPCRegisterInfo.td284 def CR4 : CR<4, "cr4", [CR4LT, CR4GT, CR4EQ, CR4UN]>, DwarfRegNum<[72, 72]>;
470 CR7, CR2, CR3, CR4)> {
471 let AltOrders = [(sub CRRC, CR2, CR3, CR4)];
H A DPPCRegisterInfo.cpp1613 if (PPC::CR2 <= Reg && Reg <= PPC::CR4) { in hasReservedSpillSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCInstPrinter.cpp503 case PPC::CR4: RegNo = 4; break; in printcrbitm()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h514 ENTRY(CR4) \
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.td514 def CR4 : X86Reg<"cr4", 4>;
/freebsd/share/misc/
H A Dpci_vendors36680 325c Power Control Unit (PCU) CR4