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/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/cpu_model/
H A Dx86.c328 const char *CPU = 0; in getIntelProcessorTypeAndSubtype() local
340 CPU = "core2"; in getIntelProcessorTypeAndSubtype()
349 CPU = "penryn"; in getIntelProcessorTypeAndSubtype()
358 CPU = "nehalem"; in getIntelProcessorTypeAndSubtype()
366 CPU = "westmere"; in getIntelProcessorTypeAndSubtype()
373 CPU = "sandybridge"; in getIntelProcessorTypeAndSubtype()
379 CPU = "ivybridge"; in getIntelProcessorTypeAndSubtype()
389 CPU = "haswell"; in getIntelProcessorTypeAndSubtype()
399 CPU = "broadwell"; in getIntelProcessorTypeAndSubtype()
411 CPU = "skylake"; in getIntelProcessorTypeAndSubtype()
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/freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/
H A DPPCTargetParser.def162 PPC_LNX_FEATURE("4xxmac","4xx CPU has a Multiply Accumulator",PPCF_4XXMAC,0x02000000,PPC_FAWORD_HWC…
163 PPC_LNX_FEATURE("altivec","CPU has a SIMD/Vector Unit",PPCF_ALTIVEC,0x10000000,PPC_FAWORD_HWCAP)
164 PPC_LNX_FEATURE("arch_2_05","CPU supports ISA 205 (eg, POWER6)",PPCF_ARCH205,0x00001000,PPC_FAWORD_…
165 PPC_LNX_FEATURE("arch_2_06","CPU supports ISA 206 (eg, POWER7)",PPCF_ARCH206,0x00000100,PPC_FAWORD_…
166 PPC_LNX_FEATURE("arch_2_07","CPU supports ISA 207 (eg, POWER8)",PPCF_ARCH207,0x80000000,PPC_FAWORD_…
167 PPC_LNX_FEATURE("arch_3_00","CPU supports ISA 30 (eg, POWER9)",PPCF_ARCH30,0x00800000,PPC_FAWORD_HW…
168 PPC_LNX_FEATURE("arch_3_1","CPU supports ISA 31 (eg, POWER10)",PPCF_ARCH31,0x00040000,PPC_FAWORD_HW…
169 PPC_LNX_FEATURE("archpmu","CPU supports the set of compatible performance monitoring events",PPCF_A…
170 PPC_LNX_FEATURE("booke","CPU supports the Embedded ISA category",PPCF_BOOKE,0x00008000,PPC_FAWORD_H…
171 PPC_LNX_FEATURE("cellbe","CPU has a CELL broadband engine",PPCF_CELLBE,0x00010000,PPC_FAWORD_HWCAP)
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFSubtarget.cpp49 BPFSubtarget &BPFSubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies() argument
52 initSubtargetFeatures(CPU, FS); in initializeSubtargetDependencies()
53 ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS); in initializeSubtargetDependencies()
71 void BPFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { in initSubtargetFeatures() argument
72 if (CPU.empty()) in initSubtargetFeatures()
73 CPU = "v3"; in initSubtargetFeatures()
74 if (CPU == "probe") in initSubtargetFeatures()
75 CPU = sys::detail::getHostCPUNameForBPF(); in initSubtargetFeatures()
76 if (CPU == "generic" || CPU == "v1") in initSubtargetFeatures()
78 if (CPU == "v2") { in initSubtargetFeatures()
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/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DPPCTargetParser.cpp37 static const CPUInfo *getCPUInfoByName(StringRef CPU) { in getCPUInfoByName() argument
39 if (C.Name == CPU) in getCPUInfoByName()
88 bool isValidCPU(StringRef CPU) { in isValidCPU() argument
89 const CPUInfo *Info = getCPUInfoByName(CPU); in isValidCPU()
98 StringRef CPU = sys::getHostCPUName(); in getNormalizedPPCTargetCPU() local
99 if (!CPU.empty() && CPU != "generic") in getNormalizedPPCTargetCPU()
100 return CPU; in getNormalizedPPCTargetCPU()
103 StringRef CPU = normalizeCPUName(CPUName); in getNormalizedPPCTargetCPU() local
104 if (CPU != "generic" && CPU != "native") in getNormalizedPPCTargetCPU()
105 return CPU; in getNormalizedPPCTargetCPU()
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H A DHost.cpp712 StringRef CPU; in getIntelProcessorTypeAndSubtype() local
716 CPU = "i386"; in getIntelProcessorTypeAndSubtype()
719 CPU = "i486"; in getIntelProcessorTypeAndSubtype()
723 CPU = "pentium-mmx"; in getIntelProcessorTypeAndSubtype()
726 CPU = "pentium"; in getIntelProcessorTypeAndSubtype()
737 CPU = "core2"; in getIntelProcessorTypeAndSubtype()
746 CPU = "penryn"; in getIntelProcessorTypeAndSubtype()
755 CPU = "nehalem"; in getIntelProcessorTypeAndSubtype()
763 CPU = "westmere"; in getIntelProcessorTypeAndSubtype()
770 CPU = "sandybridge"; in getIntelProcessorTypeAndSubtype()
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H A DRISCVTargetParser.cpp43 static const CPUInfo *getCPUInfoByName(StringRef CPU) { in getCPUInfoByName() argument
45 if (C.Name == CPU) in getCPUInfoByName()
50 bool hasFastScalarUnalignedAccess(StringRef CPU) { in hasFastScalarUnalignedAccess() argument
51 const CPUInfo *Info = getCPUInfoByName(CPU); in hasFastScalarUnalignedAccess()
55 bool hasFastVectorUnalignedAccess(StringRef CPU) { in hasFastVectorUnalignedAccess() argument
56 const CPUInfo *Info = getCPUInfoByName(CPU); in hasFastVectorUnalignedAccess()
60 bool hasValidCPUModel(StringRef CPU) { return getCPUModel(CPU).isValid(); } in hasValidCPUModel() argument
62 CPUModel getCPUModel(StringRef CPU) { in getCPUModel() argument
63 const CPUInfo *Info = getCPUInfoByName(CPU); in getCPUModel()
79 bool parseCPU(StringRef CPU, bool IsRV64) { in parseCPU() argument
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/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DHexagon.cpp29 if (CPU == "hexagonv5") { in getTargetDefines()
36 } else if (CPU == "hexagonv55") { in getTargetDefines()
41 } else if (CPU == "hexagonv60") { in getTargetDefines()
47 } else if (CPU == "hexagonv62") { in getTargetDefines()
51 } else if (CPU == "hexagonv65") { in getTargetDefines()
55 } else if (CPU == "hexagonv66") { in getTargetDefines()
59 } else if (CPU == "hexagonv67") { in getTargetDefines()
62 } else if (CPU == "hexagonv67t") { in getTargetDefines()
65 } else if (CPU == "hexagonv68") { in getTargetDefines()
68 } else if (CPU == "hexagonv69") { in getTargetDefines()
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H A DMips.cpp38 return llvm::StringSwitch<bool>(CPU) in processorSupportsGPR64()
201 Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\""); in getTargetDefines()
202 if (CPU == "octeon+") in getTargetDefines()
205 Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper()); in getTargetDefines()
207 if (StringRef(CPU).starts_with("octeon")) in getTargetDefines()
210 if (CPU != "mips1") { in getTargetDefines()
250 Diags.Report(diag::err_target_unsupported_cpu_for_micromips) << CPU; in validateTarget()
256 Diags.Report(diag::err_target_unsupported_abi) << ABI << CPU; in validateTarget()
269 Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfpxx" << CPU; in validateTarget()
273 if (FPMode != FP64 && FPMode != FPXX && (CPU == "mips32r6" || in validateTarget()
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H A DBPF.cpp40 std::string CPU = getTargetOpts().CPU; in getTargetDefines() local
41 if (CPU == "probe") { in getTargetDefines()
50 if (CPU.empty()) in getTargetDefines()
51 CPU = "v3"; in getTargetDefines()
53 if (CPU == "generic" || CPU == "v1") { in getTargetDefines()
58 std::string CpuVerNumStr = CPU.substr(1); in getTargetDefines()
H A DMips.h44 std::string CPU; variable
79 CPU = ABI == "o32" ? "mips32r2" : "mips64r2"; in MipsTargetInfo()
86 return CPU == "mips32r6" || CPU == "mips64r6"; in isIEEE754_2008Default()
90 if (CPU == "mips32r6" || ABI == "n32" || ABI == "n64" || ABI == "64") in getDefaultFPMode()
92 else if (CPU == "mips1") in getDefaultFPMode()
176 CPU = Name; in setCPU()
180 const std::string &getCPU() const { return CPU; } in getCPU()
183 StringRef CPU, in initFeatureMap() argument
185 if (CPU.empty()) in initFeatureMap()
186 CPU = getCPU(); in initFeatureMap()
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/freebsd/crypto/krb5/src/config/
H A Dwin-pre.in19 # Figure out the CPU
21 !if !defined(CPU) || "$(CPU)" == ""
22 CPU=$(PROCESSOR_ARCHITECTURE)
23 !endif # CPU
25 !if "$(CPU)" == ""
26 CPU=i386
30 !if ( "$(CPU)" == "X86" ) || ( "$(CPU)" == "x86" )
31 CPU=i386
32 !endif # CPU == X86
34 …f ( "$(CPU)" != "i386" ) && ( "$(CPU)" != "ALPHA" ) && ( "$(CPU)" != "ALPHA64" ) && ( "$(CPU)" != …
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRSubtarget.cpp29 AVRSubtarget::AVRSubtarget(const Triple &TT, const std::string &CPU, in AVRSubtarget() argument
31 : AVRGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), InstrInfo(*this), in AVRSubtarget()
32 TLInfo(TM, initializeSubtargetDependencies(CPU, FS, TM)) { in AVRSubtarget()
34 ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS); in AVRSubtarget()
38 AVRSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS, in initializeSubtargetDependencies() argument
41 ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS); in initializeSubtargetDependencies()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblySubtarget.cpp28 WebAssemblySubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies() argument
33 if (CPU.empty()) in initializeSubtargetDependencies()
34 CPU = "generic"; in initializeSubtargetDependencies()
36 ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS); in initializeSubtargetDependencies()
59 const std::string &CPU, in WebAssemblySubtarget() argument
62 : WebAssemblyGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), in WebAssemblySubtarget()
63 TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)), in WebAssemblySubtarget()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchSubtarget.cpp35 const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, in initializeSubtargetDependencies() argument
38 if (CPU.empty() || CPU == "generic") in initializeSubtargetDependencies()
39 CPU = Is64Bit ? "generic-la64" : "generic-la32"; in initializeSubtargetDependencies()
42 TuneCPU = CPU; in initializeSubtargetDependencies()
44 ParseSubtargetFeatures(CPU, TuneCPU, FS); in initializeSubtargetDependencies()
91 LoongArchSubtarget::LoongArchSubtarget(const Triple &TT, StringRef CPU, in LoongArchSubtarget() argument
95 : LoongArchGenSubtargetInfo(TT, CPU, TuneCPU, FS), in LoongArchSubtarget()
97 initializeSubtargetDependencies(TT, CPU, TuneCPU, FS, ABIName)), in LoongArchSubtarget()
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCSubtargetInfo.cpp153 for (auto &CPU : CPUNames) { in cpuHelp() local
157 if (CPU == "apple-latest") in cpuHelp()
159 errs() << "\t" << CPU << "\n"; in cpuHelp()
170 static FeatureBitset getFeatures(MCSubtargetInfo &STI, StringRef CPU, in getFeatures() argument
186 if (CPU == "help") in getFeatures()
190 else if (!CPU.empty()) { in getFeatures()
191 const SubtargetSubTypeKV *CPUEntry = Find(CPU, ProcDesc); in getFeatures()
198 errs() << "'" << CPU << "' is not a recognized processor for this target" in getFeatures()
210 } else if (TuneCPU != CPU) { in getFeatures()
230 void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU, in InitMCProcessorInfo() argument
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/freebsd/contrib/llvm-project/compiler-rt/lib/xray/
H A Dxray_fdr_controller.h147 uint16_t CPU) XRAY_NEVER_INSTRUMENT { in recordPreamble() argument
148 if (UNLIKELY(LatestCPU != CPU || LatestTSC == 0)) { in recordPreamble()
152 LatestCPU = CPU; in recordPreamble()
157 W.writeMetadata<MetadataRecord::RecordKinds::NewCPUId>(CPU, TSC); in recordPreamble()
161 DCHECK_EQ(LatestCPU, CPU); in recordPreamble()
182 uint16_t CPU) XRAY_NEVER_INSTRUMENT { in rewindRecords() argument
245 uint16_t CPU) XRAY_NEVER_INSTRUMENT { in functionEnter() argument
250 auto PreambleStatus = recordPreamble(TSC, CPU); in functionEnter()
269 uint16_t CPU) XRAY_NEVER_INSTRUMENT { in functionTailExit() argument
276 auto PreambleStatus = recordPreamble(TSC, CPU); in functionTailExit()
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/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/
H A DM68k.cpp30 std::string CPU = std::string(llvm::sys::getHostCPUName()); in getM68kTargetCPU() local
31 if (!CPU.empty() && CPU != "generic") in getM68kTargetCPU()
32 return CPU; in getM68kTargetCPU()
75 std::string CPU = m68k::getM68kTargetCPU(Args); in addFloatABIFeatures() local
77 if ((A && (CPU == "M68000" || CPU == "M68010")) || in addFloatABIFeatures()
79 CPU == "M68020") in addFloatABIFeatures()
81 else if (CPU == "M68030" || CPU == "M68040" || CPU == "M68060") in addFloatABIFeatures()
H A DRISCV.cpp83 StringRef CPU = A->getValue(); in getRISCVTargetFeatures() local
84 if (CPU == "native") in getRISCVTargetFeatures()
85 CPU = llvm::sys::getHostCPUName(); in getRISCVTargetFeatures()
87 getRISCFeaturesFromMcpu(D, A, Triple, CPU, Features); in getRISCVTargetFeatures()
89 if (llvm::RISCV::hasFastScalarUnalignedAccess(CPU)) in getRISCVTargetFeatures()
91 if (llvm::RISCV::hasFastVectorUnalignedAccess(CPU)) in getRISCVTargetFeatures()
283 StringRef CPU = A->getValue(); in getRISCVArch() local
284 if (CPU == "native") { in getRISCVArch()
285 CPU = llvm::sys::getHostCPUName(); in getRISCVArch()
287 if (CPU.starts_with("generic")) { in getRISCVArch()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVESubtarget.cpp26 VESubtarget &VESubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies() argument
32 std::string CPUName = std::string(CPU); in initializeSubtargetDependencies()
37 ParseSubtargetFeatures(CPUName, /*TuneCPU=*/CPU, FS); in initializeSubtargetDependencies()
42 VESubtarget::VESubtarget(const Triple &TT, const std::string &CPU, in VESubtarget() argument
44 : VEGenSubtargetInfo(TT, CPU, /*TuneCPU=*/CPU, FS), TargetTriple(TT), in VESubtarget()
45 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this), in VESubtarget()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kSubtarget.cpp41 static StringRef selectM68kCPU(Triple TT, StringRef CPU) { in selectM68kCPU() argument
42 if (CPU.empty() || CPU == "generic") { in selectM68kCPU()
43 CPU = "M68000"; in selectM68kCPU()
45 return CPU; in selectM68kCPU()
50 M68kSubtarget::M68kSubtarget(const Triple &TT, StringRef CPU, StringRef FS, in M68kSubtarget() argument
52 : M68kGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), TM(TM), in M68kSubtarget()
53 InstrInfo(initializeSubtargetDependencies(CPU, TT, FS, TM)), in M68kSubtarget()
95 StringRef CPU, Triple TT, StringRef FS, const M68kTargetMachine &TM) { in initializeSubtargetDependencies() argument
96 std::string CPUName = selectM68kCPU(TT, CPU).str(); in initializeSubtargetDependencies()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsTargetMachine.cpp80 static std::string computeDataLayout(const Triple &TT, StringRef CPU, in computeDataLayout() argument
84 MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions); in computeDataLayout()
129 StringRef CPU, StringRef FS, in MipsTargetMachine() argument
135 : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options, isLittle), in MipsTargetMachine()
136 TT, CPU, FS, Options, in MipsTargetMachine()
140 ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)), in MipsTargetMachine()
142 DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt), in MipsTargetMachine()
143 NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16", in MipsTargetMachine()
145 Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16", in MipsTargetMachine()
159 StringRef CPU, StringRef FS, in MipsebTargetMachine() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZSubtarget.cpp31 StringRef CPU, StringRef TuneCPU, StringRef FS) { in initializeSubtargetDependencies() argument
32 if (CPU.empty()) in initializeSubtargetDependencies()
33 CPU = "generic"; in initializeSubtargetDependencies()
35 TuneCPU = CPU; in initializeSubtargetDependencies()
37 ParseSubtargetFeatures(CPU, TuneCPU, FS); in initializeSubtargetDependencies()
67 SystemZSubtarget::SystemZSubtarget(const Triple &TT, const std::string &CPU, in SystemZSubtarget() argument
71 : SystemZGenSubtargetInfo(TT, CPU, TuneCPU, FS), TargetTriple(TT), in SystemZSubtarget()
73 InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)), in SystemZSubtarget()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaSubtarget.cpp26 XtensaSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { in initializeSubtargetDependencies() argument
27 StringRef CPUName = CPU; in initializeSubtargetDependencies()
38 XtensaSubtarget::XtensaSubtarget(const Triple &TT, StringRef CPU, StringRef FS, in XtensaSubtarget() argument
40 : XtensaGenSubtargetInfo(TT, CPU, /*TuneCPU=*/CPU, FS), TargetTriple(TT), in XtensaSubtarget()
41 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this), in XtensaSubtarget()
H A DXtensaTargetMachine.cpp35 static std::string computeDataLayout(const Triple &TT, StringRef CPU, in computeDataLayout() argument
50 StringRef CPU, StringRef FS, in XtensaTargetMachine() argument
56 : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options, IsLittle), in XtensaTargetMachine()
57 TT, CPU, FS, Options, in XtensaTargetMachine()
65 StringRef CPU, StringRef FS, in XtensaTargetMachine() argument
70 : XtensaTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} in XtensaTargetMachine()
77 auto CPU = CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU; in getSubtargetImpl() local
80 auto &I = SubtargetMap[CPU + FS]; in getSubtargetImpl()
86 I = std::make_unique<XtensaSubtarget>(TargetTriple, CPU, FS, *this); in getSubtargetImpl()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcTargetMachine.cpp106 StringRef CPU, StringRef FS, in SparcTargetMachine() argument
113 T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options, in SparcTargetMachine()
130 std::string CPU = in getSubtargetImpl() local
133 TuneAttr.isValid() ? TuneAttr.getValueAsString().str() : CPU; in getSubtargetImpl()
145 auto &I = SubtargetMap[CPU + FS]; in getSubtargetImpl()
151 I = std::make_unique<SparcSubtarget>(CPU, TuneCPU, FS, *this, in getSubtargetImpl()
210 StringRef CPU, StringRef FS, in SparcV8TargetMachine() argument
215 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} in SparcV8TargetMachine()
220 StringRef CPU, StringRef FS, in SparcV9TargetMachine() argument
225 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} in SparcV9TargetMachine()
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