Searched refs:CONST32 (Results 1 – 13 of 13) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitConst32AndConst64.cpp | 68 if (Opc == Hexagon::CONST32) { in runOnMachineFunction()
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| H A D | HexagonGenMemAbsolute.cpp | 87 if (Opc != Hexagon::CONST32 && Opc != Hexagon::A2_tfrsi) in runOnMachineFunction()
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| H A D | HexagonPseudo.td | 65 def CONST32 : CONSTLDInst<(outs IntRegs:$Rd), (ins i32imm:$v), 66 "$Rd = CONST32(#$v)", []>;
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| H A D | HexagonBitTracker.cpp | 201 case CONST32: in evaluate() 313 case CONST32: in evaluate()
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| H A D | HexagonISelLowering.cpp | 1316 return DAG.getNode(HexagonISD::CONST32, dl, PtrVT, GA); in LowerGLOBALADDRESS() 1414 SDValue Sym = DAG.getNode(HexagonISD::CONST32, dl, PtrVT, TGA); in LowerToTLSInitialExecModel() 1450 SDValue Sym = DAG.getNode(HexagonISD::CONST32, dl, PtrVT, TGA); in LowerToTLSLocalExecModel() 1475 SDValue Sym = DAG.getNode(HexagonISD::CONST32, dl, PtrVT, TGA); in LowerToTLSGeneralDynamicModel() 1941 case HexagonISD::CONST32: return "HexagonISD::CONST32"; in getTargetNodeName()
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| H A D | HexagonAsmPrinter.cpp | 344 case Hexagon::CONST32: in HexagonProcessInstruction()
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| H A D | HexagonISelDAGToDAG.cpp | 1551 if (!UseGP && GAOpc != HexagonISD::CONST32) in SelectGlobalAddress() 1570 case HexagonISD::CONST32: in SelectGlobalAddress() 2029 return V.getOpcode() == HexagonISD::CONST32 || in isTargetConstant()
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| H A D | HexagonISelLowering.h | 37 CONST32 = OP_BEGIN, enumerator
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| H A D | HexagonConstPropagation.cpp | 1978 case Hexagon::CONST32: in evaluate() 2335 case Hexagon::CONST32: in rewrite()
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| H A D | HexagonHardwareLoops.cpp | 1552 case Hexagon::CONST32: in checkForImmediate()
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| H A D | HexagonBitSimplify.cpp | 1409 case Hexagon::CONST32: in isTfrConst()
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| H A D | HexagonPatterns.td | 413 def HexagonCONST32: SDNode<"HexagonISD::CONST32", SDTHexagonCONST32>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1514 case Hexagon::CONST32: in processInstruction()
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