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Searched refs:COND_EQ (Results 1 – 15 of 15) sorted by relevance

/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DARMDefines.h33 #define COND_EQ \ macro
73 case COND_EQ: in ARMCondCodeToString()
115 case COND_EQ: in ARMConditionPassed()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.h42 COND_EQ = 7, // Equal enumerator
75 return M68k::COND_EQ; in GetOppositeBranchCondition()
76 case M68k::COND_EQ: in GetOppositeBranchCondition()
101 case M68k::COND_EQ: in GetCondBranchFromCond()
137 return M68k::COND_EQ; in GetCondFromBranchOpc()
H A DM68kISelLowering.cpp1671 M68k::CondCode Cond = CC == ISD::SETEQ ? M68k::COND_NE : M68k::COND_EQ; in getBitTestCondition()
1730 return M68k::COND_EQ; in TranslateIntegerM68kCC()
1809 return M68k::COND_EQ; in TranslateM68kCC()
1957 if ((M68kCC == M68k::COND_EQ || M68kCC == M68k::COND_NE) && in EmitTest()
2089 case M68k::COND_EQ: in isM68kCCUnsigned()
2287 (CondCode == M68k::COND_EQ || CondCode == M68k::COND_NE)) { in LowerSELECT()
2316 if (isAllOnesConstant(Op1) != (CondCode == M68k::COND_EQ)) in LowerSELECT()
2600 M68k::CondCode MxCond = Inverted ? M68k::COND_EQ : M68k::COND_NE; in LowerBRCOND()
H A DM68kInstrInfo.cpp55 return M68k::COND_EQ; in getCondFromBranchOpc()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp196 case AVRCC::COND_EQ: in getBrCond()
220 return AVRCC::COND_EQ; in getCondFromBranchOpc()
242 case AVRCC::COND_EQ: in getOppositeCondition()
245 return AVRCC::COND_EQ; in getOppositeCondition()
H A DAVRInstrInfo.h34 COND_EQ, //!< Equal enumerator
H A DAVRISelLowering.cpp564 return AVRCC::COND_EQ; in intCCToAVRCC()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.h183 return RISCVCC::COND_EQ; in getRISCVCCForIntCC()
H A DRISCVInstrInfo.cpp969 return RISCVCC::COND_EQ; in getCondFromBranchOpc()
1001 case RISCVCC::COND_EQ: in evaluateCondBranch()
1036 case RISCVCC::COND_EQ: in getBrCond()
1054 case RISCVCC::COND_EQ: in getBrCond()
1064 case RISCVCC::COND_EQ: in getBrCond()
1088 case RISCVCC::COND_EQ: in getBrCond()
1112 case RISCVCC::COND_EQ: in getBrCond()
1122 case RISCVCC::COND_EQ: in getBrCond()
1135 case RISCVCC::COND_EQ: in getOppositeBranchCondition()
1138 return RISCVCC::COND_EQ; in getOppositeBranchCondition()
H A DRISCVInstrInfo.h38 COND_EQ, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DVOPCInstructions.td774 defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>;
839 defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>;
857 defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>;
1261 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>;
1272 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>;
1284 defm : ICMP_Pattern_t16 <COND_EQ, V_CMP_EQ_U16_t16_e64, i16>;
1297 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_fake16_e64, i16>;
1310 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>;
H A DAMDGPUInstructions.td385 def COND_EQ : PatFrags<(ops), [(OtherVT SETEQ), (OtherVT SETUEQ)]>;
H A DSOPInstructions.td1322 def S_CMP_EQ_U32 : SOPC_CMP_32 <"s_cmp_eq_u32", COND_EQ>;
1337 def S_CMP_EQ_U64 : SOPC_CMP_64 <"s_cmp_eq_u64", COND_EQ>;
H A DR600Instructions.td895 [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_EQ))]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp598 return RISCVCC::COND_EQ; in getRISCVCCFromICmp()