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Searched refs:CD0_IR1_S (Results 1 – 1 of 1) sorted by relevance

/freebsd/sys/arm64/iommu/
H A Dsmmureg.h441 #define CD0_IR1_S 24 /* Inner region Cacheability for TT1 access*/ macro
442 #define CD0_IR1_M (0x3 << CD0_IR1_S)