| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | ComparisonCategories.cpp | 186 using CCVT = ComparisonCategoryResult; in getResultString() typedef
188 case CCVT::Equal: in getResultString()
190 case CCVT::Equivalent: in getResultString()
192 case CCVT::Less: in getResultString()
194 case CCVT::Greater: in getResultString()
196 case CCVT::Unordered: in getResultString()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 6474 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in buildSDIVPow2WithCMov() local
6475 SDValue Cmp = DAG.getSetCC(DL, CCVT, N0, Zero, ISD::SETLT); in buildSDIVPow2WithCMov()
7432 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in getSqrtInputTest() local
7440 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
7450 return DAG.getSetCC(DL, CCVT, Fabs, NormC, ISD::SETLT); in getSqrtInputTest()
8710 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandFMINIMUM_FMAXIMUM() local
8735 DAG.getSetCC(DL, CCVT, LHS, RHS, IsMax ? ISD::SETOGT : ISD::SETOLT); in expandFMINIMUM_FMAXIMUM()
8744 MinMax = DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, LHS, RHS, ISD::SETUO), in expandFMINIMUM_FMAXIMUM()
8751 SDValue IsZero = DAG.getSetCC(DL, CCVT, MinMax, in expandFMINIMUM_FMAXIMUM()
8756 DL, VT, DAG.getNode(ISD::IS_FPCLASS, DL, CCVT, LHS, TestZero), LHS, in expandFMINIMUM_FMAXIMUM()
[all …]
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| H A D | DAGCombiner.cpp | 5039 EVT CCVT = getSetCCResultType(VT); in visitSDIV() local
5058 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitSDIV()
5121 EVT CCVT = getSetCCResultType(VT); in visitSDIVLike() local
5159 SDValue IsOne = DAG.getSetCC(DL, CCVT, N1, One, ISD::SETEQ); in visitSDIVLike()
5160 SDValue IsAllOnes = DAG.getSetCC(DL, CCVT, N1, AllOnes, ISD::SETEQ); in visitSDIVLike()
5161 SDValue IsOneOrAllOnes = DAG.getNode(ISD::OR, DL, CCVT, IsOne, IsAllOnes); in visitSDIVLike()
5170 SDValue IsNeg = DAG.getSetCC(DL, CCVT, N1, Zero, ISD::SETLT); in visitSDIVLike()
5191 EVT CCVT = getSetCCResultType(VT); in visitUDIV() local
5205 if (N1C && N1C->isAllOnes() && CCVT.isVector() == VT.isVector()) { in visitUDIV()
5206 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitUDIV()
[all …]
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| H A D | SelectionDAGBuilder.cpp | 8034 EVT CCVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local
8039 if (!TLI.shouldExpandGetActiveLaneMask(CCVT, ElementVT)) { in visitIntrinsicCall()
8040 setValue(&I, DAG.getNode(ISD::GET_ACTIVE_LANE_MASK, sdl, CCVT, Index, in visitIntrinsicCall()
8046 CCVT.getVectorElementCount()); in visitIntrinsicCall()
8053 SDValue SetCC = DAG.getSetCC(sdl, CCVT, VectorInduction, in visitIntrinsicCall()
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| H A D | LegalizeDAG.cpp | 4322 EVT CCVT = getSetCCResultType(CmpVT); in ExpandNode() local
4323 SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC, Node->getFlags()); in ExpandNode()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 5733 LLT CCVT = in applySDivByPow2() local
5770 auto IsOne = Builder.buildICmp(CmpInst::Predicate::ICMP_EQ, CCVT, RHS, One); in applySDivByPow2()
5772 Builder.buildICmp(CmpInst::Predicate::ICMP_EQ, CCVT, RHS, MinusOne); in applySDivByPow2()
5773 auto IsOneOrMinusOne = Builder.buildOr(CCVT, IsOne, IsMinusOne); in applySDivByPow2()
5779 auto IsNeg = Builder.buildICmp(CmpInst::Predicate::ICMP_SLT, CCVT, RHS, Zero); in applySDivByPow2()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2328 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in LowerUDIVREM() local
2330 SDValue Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE); in LowerUDIVREM()
2337 Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE); in LowerUDIVREM()
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| H A D | SIISelLowering.cpp | 6382 EVT CCVT = EVT::getIntegerVT(*DAG.getContext(), WavefrontSize); in lowerICMPIntrinsic() local
6384 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, DL, CCVT, LHS, RHS, in lowerICMPIntrinsic()
6386 if (VT.bitsEq(CCVT)) in lowerICMPIntrinsic()
6412 EVT CCVT = EVT::getIntegerVT(*DAG.getContext(), WavefrontSize); in lowerFCMPIntrinsic() local
6413 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, SL, CCVT, Src0, Src1, in lowerFCMPIntrinsic()
6415 if (VT.bitsEq(CCVT)) in lowerFCMPIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12177 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in getSqrtInputTest() local
12179 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
25597 EVT CCVT = N0.getValueType(); in performVSelectCombine() local
25655 CCVT.getVectorElementCount() != ElementCount::getFixed(1) || in performVSelectCombine()
25656 CCVT.getVectorElementType() != MVT::i1 || in performVSelectCombine()
25711 EVT CCVT = SrcVT.changeVectorElementTypeToInteger(); in performSelectCombine() local
25716 if (CCVT.getSizeInBits() != ResVT.getSizeInBits()) in performSelectCombine()
25730 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine()
25733 SmallVector<int, 8> DUPMask(CCVT.getVectorNumElements(), 0); in performSelectCombine()
25734 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask); in performSelectCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 8053 EVT CCVT = in LowerOperation() local
8057 DAG.getNode(ISD::SETCC, DL, CCVT, Tmp1, Tmp2, CC, Op->getFlags()); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 47283 EVT CCVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, NumElts); in combineToExtendBoolVectorInReg() local
47284 Vec = DAG.getSetCC(DL, CCVT, Vec, BitMask, ISD::SETEQ); in combineToExtendBoolVectorInReg()
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