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Searched refs:ByteVT (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp1512 EVT ByteVT = EVT::getVectorVT(*DAG.getContext(), MVT::i8, ShuffleMask.size()); in ExpandBSWAP() local
1515 if (TLI.isShuffleMaskLegal(ShuffleMask, ByteVT)) { in ExpandBSWAP()
1517 SDValue Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Node->getOperand(0)); in ExpandBSWAP()
1518 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), ShuffleMask); in ExpandBSWAP()
1553 EVT ByteVT = EVT::getVectorVT(*DAG.getContext(), MVT::i8, BSWAPMask.size()); in ExpandBITREVERSE() local
1554 if (TLI.isShuffleMaskLegal(BSWAPMask, ByteVT) && in ExpandBITREVERSE()
1555 (TLI.isOperationLegalOrCustom(ISD::BITREVERSE, ByteVT) || in ExpandBITREVERSE()
1556 (TLI.isOperationLegalOrCustom(ISD::SHL, ByteVT) && in ExpandBITREVERSE()
1557 TLI.isOperationLegalOrCustom(ISD::SRL, ByteVT) && in ExpandBITREVERSE()
1558 TLI.isOperationLegalOrCustomOrPromote(ISD::AND, ByteVT) && in ExpandBITREVERSE()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp1238 MVT ByteVT = MVT::getVectorVT(MVT::i8, VT.getSizeInBits() / 8); in lowerVECTOR_SHUFFLEAsByteRotate() local
1239 Lo = DAG.getBitcast(ByteVT, Lo); in lowerVECTOR_SHUFFLEAsByteRotate()
1240 Hi = DAG.getBitcast(ByteVT, Hi); in lowerVECTOR_SHUFFLEAsByteRotate()
1245 SDValue LoShift = DAG.getNode(LoongArchISD::VBSLL, DL, ByteVT, Lo, in lowerVECTOR_SHUFFLEAsByteRotate()
1247 SDValue HiShift = DAG.getNode(LoongArchISD::VBSRL, DL, ByteVT, Hi, in lowerVECTOR_SHUFFLEAsByteRotate()
1249 return DAG.getBitcast(VT, DAG.getNode(ISD::OR, DL, ByteVT, LoShift, HiShift)); in lowerVECTOR_SHUFFLEAsByteRotate()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp11582 MVT ByteVT = MVT::getVectorVT(MVT::i8, VT.getSizeInBits() / 8); in lowerShuffleAsByteRotateAndPermute() local
11584 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, DAG.getBitcast(ByteVT, Hi), in lowerShuffleAsByteRotateAndPermute()
11585 DAG.getBitcast(ByteVT, Lo), in lowerShuffleAsByteRotateAndPermute()
11948 MVT ByteVT = MVT::getVectorVT(MVT::i8, VT.getSizeInBits() / 8); in lowerShuffleAsByteRotate() local
11949 Lo = DAG.getBitcast(ByteVT, Lo); in lowerShuffleAsByteRotate()
11950 Hi = DAG.getBitcast(ByteVT, Hi); in lowerShuffleAsByteRotate()
11957 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, Lo, Hi, in lowerShuffleAsByteRotate()
11965 assert(ByteVT == MVT::v16i8 && in lowerShuffleAsByteRotate()
32556 MVT ByteVT = MVT::getVectorVT(MVT::i8, VT.getSizeInBits() / 8); in LowerVectorCTPOP() local
32557 SDValue ByteOp = DAG.getBitcast(ByteVT, Op0); in LowerVectorCTPOP()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp17999 unsigned ByteVT = ShouldLOAD->getMemoryVT().getSizeInBits() / 8; in shouldFoldConstantShiftPairToMask() local
18000 if ((1ULL << ShlAmt) == ByteVT && in shouldFoldConstantShiftPairToMask()
21720 EVT ByteVT = in LowerSVEIntrinsicEXT() local
21724 SDValue Op0 = DAG.getNode(ISD::BITCAST, DL, ByteVT, N->getOperand(1)); in LowerSVEIntrinsicEXT()
21725 SDValue Op1 = DAG.getNode(ISD::BITCAST, DL, ByteVT, N->getOperand(2)); in LowerSVEIntrinsicEXT()
21729 SDValue EXT = DAG.getNode(AArch64ISD::EXT, DL, ByteVT, Op0, Op1, Op2); in LowerSVEIntrinsicEXT()