Searched refs:BrInst (Results 1 – 3 of 3) sorted by relevance
578 const BranchInst &BrInst = cast<BranchInst>(U); in translateBr() local580 auto *Succ0MBB = &getMBB(*BrInst.getSuccessor(0)); in translateBr()582 if (BrInst.isUnconditional()) { in translateBr()589 for (const BasicBlock *Succ : successors(&BrInst)) in translateBr()596 const Value *CondVal = BrInst.getCondition(); in translateBr()597 MachineBasicBlock *Succ1MBB = &getMBB(*BrInst.getSuccessor(1)); in translateBr()619 !BrInst.hasMetadata(LLVMContext::MD_unpredictable)) { in translateBr()1334 const IndirectBrInst &BrInst = cast<IndirectBrInst>(U); in translateIndirectBr() local1336 const Register Tgt = getOrCreateVReg(*BrInst.getAddress()); in translateIndirectBr()1342 for (const BasicBlock *Succ : successors(&BrInst)) { in translateIndirectBr()
1013 auto *BrInst = new UnreachableInst(MiddleBB->getContext()); in execute() local1014 BrInst->insertBefore(MiddleBB->getTerminator()); in execute()
2973 auto *BrInst = cast<BranchInst>(&I); in updateImpl() local2976 if (BrInst->isUnconditional()) in updateImpl()2982 stopOnUndefOrAssumed(A, BrInst->getCondition(), BrInst); in updateImpl()3136 auto *BrInst = cast<BranchInst>(I); in isAssumedToCauseUB() local3137 if (BrInst->isUnconditional()) in isAssumedToCauseUB()