| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | IfConversion.cpp | 149 SmallVector<MachineOperand, 4> BrCond; member
621 if (!TII->reverseBranchCondition(BBI.BrCond)) { in reverseBranchCondition()
623 TII->insertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); in reverseBranchCondition()
684 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) in ValidTriangle()
891 if (TrueBBI.BrCond.size() == 0 || in ValidForkedDiamond()
892 FalseBBI.BrCond.size() == 0) in ValidForkedDiamond()
1024 BBI.BrCond.clear(); in AnalyzeBranches()
1026 !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); in AnalyzeBranches()
1030 BBI.BrCond.clear(); in AnalyzeBranches()
1033 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBranches()
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| H A D | MachinePipeliner.cpp | 396 LI.BrCond.clear(); in canPipelineLoop()
397 if (TII->analyzeBranch(*L.getHeader(), LI.TBB, LI.FBB, LI.BrCond)) { in canPipelineLoop()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 218 bool matchOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
219 void applyOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1573 MachineInstr *&BrCond) { in matchOptBrCondByInvertingCond() argument
1595 BrCond = &*std::prev(BrIt); in matchOptBrCondByInvertingCond()
1596 if (BrCond->getOpcode() != TargetOpcode::G_BRCOND) in matchOptBrCondByInvertingCond()
1601 MachineBasicBlock *BrCondTarget = BrCond->getOperand(1).getMBB(); in matchOptBrCondByInvertingCond()
1607 MachineInstr *&BrCond) { in applyOptBrCondByInvertingCond() argument
1609 Builder.setInstrAndDebugLoc(*BrCond); in applyOptBrCondByInvertingCond()
1610 LLT Ty = MRI.getType(BrCond->getOperand(0).getReg()); in applyOptBrCondByInvertingCond()
1616 auto Xor = Builder.buildXor(Ty, BrCond->getOperand(0), True); in applyOptBrCondByInvertingCond()
1618 auto *FallthroughBB = BrCond->getOperand(1).getMBB(); in applyOptBrCondByInvertingCond()
1625 Observer.changingInstr(*BrCond); in applyOptBrCondByInvertingCond()
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| H A D | IRTranslator.cpp | 889 auto BrCond = MIB.buildBrCond(Cmp.getReg(0), *JT.Default); in emitJumpTableHeader() local
893 BrCond = MIB.buildBr(*JT.MBB); in emitJumpTableHeader()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachinePipeliner.h | 88 SmallVector<MachineOperand, 4> BrCond; member
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 2575 Value *BrCond = I.getCondition(); in shouldKeepJumpConditionsTogether() local
2576 auto ShouldCountInsn = [&RhsDeps, &BrCond](const Instruction *Ins) { in shouldKeepJumpConditionsTogether()
2580 if (UIns != BrCond && !RhsDeps.contains(UIns)) in shouldKeepJumpConditionsTogether()
2962 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSwitchCase() local
2966 setValue(CurInst, BrCond); in visitSwitchCase()
2971 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitSwitchCase()
2974 DAG.setRoot(BrCond); in visitSwitchCase()
3027 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitJumpTableHeader() local
3033 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitJumpTableHeader()
3036 DAG.setRoot(BrCond); in visitJumpTableHeader()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 7186 if (MachineInstr *BrCond = in legalizeIntrinsic() local
7194 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
7199 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
7224 BrCond->eraseFromParent(); in legalizeIntrinsic()
7234 if (MachineInstr *BrCond = in legalizeIntrinsic() local
7239 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
7245 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
7256 BrCond->eraseFromParent(); in legalizeIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 3006 Value *BrCond = BI->getCondition(); in SpeculativelyExecuteBB() local
3007 if (isa<FCmpInst>(BrCond)) in SpeculativelyExecuteBB()
3139 BrCond, TrueV, FalseV, "spec.store.select", BI); in SpeculativelyExecuteBB()
3229 Value *V = Builder.CreateSelect(BrCond, TrueV, FalseV, "spec.select", BI); in SpeculativelyExecuteBB()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 49733 SDNode *BrCond = *Flag->uses().begin(); in combineX86SubCmpForFlags() local
49734 if (BrCond->getOpcode() != X86ISD::BRCOND) in combineX86SubCmpForFlags()
49737 if (static_cast<X86::CondCode>(BrCond->getConstantOperandVal(CondNo)) != in combineX86SubCmpForFlags()
49755 SmallVector<SDValue> Ops(BrCond->op_values()); in combineX86SubCmpForFlags()
49759 Ops[CondNo] = DAG.getTargetConstant(OppositeCC, SDLoc(BrCond), MVT::i8); in combineX86SubCmpForFlags()
49764 DAG.getNode(X86ISD::BRCOND, SDLoc(BrCond), BrCond->getValueType(0), Ops); in combineX86SubCmpForFlags()
49766 if (BrCond != NewBrCond.getNode()) in combineX86SubCmpForFlags()
49767 DCI.CombineTo(BrCond, NewBrCond); in combineX86SubCmpForFlags()
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