Home
last modified time | relevance | path

Searched refs:Bitcast (Results 1 – 25 of 33) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LowerAMXType.cpp235 void combineLoadBitcast(LoadInst *LD, BitCastInst *Bitcast);
236 void combineBitcastStore(BitCastInst *Bitcast, StoreInst *ST);
237 bool transformBitcast(BitCastInst *Bitcast);
245 void X86LowerAMXType::combineLoadBitcast(LoadInst *LD, BitCastInst *Bitcast) { in combineLoadBitcast() argument
247 Use &U = *(Bitcast->use_begin()); in combineLoadBitcast()
251 IRBuilder<> Builder(Bitcast); in combineLoadBitcast()
259 Bitcast->replaceAllUsesWith(NewInst); in combineLoadBitcast()
269 void X86LowerAMXType::combineBitcastStore(BitCastInst *Bitcast, StoreInst *ST) { in combineBitcastStore() argument
271 Value *Tile = Bitcast->getOperand(0); in combineBitcastStore()
285 if (Bitcast->hasOneUse()) in combineBitcastStore()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h164 Bitcast, enumerator
348 bool isBitcast() const { return Flags & (1ULL << MCID::Bitcast); } in isBitcast()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPreLegalizerCombiner.cpp199 auto Bitcast = B.buildBitcast({S32}, CvtPk); in applyClampI64ToI16() local
203 {MinBoundaryDst.getReg(0), Bitcast.getReg(0), MaxBoundaryDst.getReg(0)}, in applyClampI64ToI16()
H A DAMDGPURegisterBankInfo.cpp1723 auto Bitcast = B.buildBitcast(S32, Src); in unpackV2S16ToS32() local
1726 auto ExtLo = B.buildSExtInReg(S32, Bitcast, 16); in unpackV2S16ToS32()
1727 auto ShiftHi = B.buildAShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1731 auto ShiftHi = B.buildLShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1733 auto ExtLo = B.buildAnd(S32, Bitcast, B.buildConstant(S32, 0xffff)); in unpackV2S16ToS32()
1738 return std::pair(Bitcast.getReg(0), ShiftHi.getReg(0)); in unpackV2S16ToS32()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerInfo.cpp54 case Bitcast: in operator <<()
178 case Bitcast: { in mutationIsSane()
H A DLegacyLegalizerInfo.cpp45 case Bitcast: in operator <<()
46 OS << "Bitcast"; in operator <<()
260 case Bitcast: in findAction()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp446 auto Bitcast = in legalizeCustom() local
453 MIRBuilder.buildFSub(Dst, Bitcast, TwoP52FP); in legalizeCustom()
455 MachineInstrBuilder ResF64 = MIRBuilder.buildFSub(s64, Bitcast, TwoP52FP); in legalizeCustom()
H A DMipsISelLowering.cpp5020 Register Bitcast = MRI.createVirtualRegister(&Mips::MSA128WRegClass); in emitSTR_D() local
5023 BuildMI(*BB, I, DL, TII->get(Mips::COPY)).addDef(Bitcast).addUse(StoreVal); in emitSTR_D()
5026 .addUse(Bitcast) in emitSTR_D()
5030 .addUse(Bitcast) in emitSTR_D()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Arm64ECCallLowering.cpp53 Bitcast, enumerator
316 ThunkArgTranslation::Bitcast}; in canonicalizeThunkType()
466 if (ArgTranslation == ThunkArgTranslation::Bitcast) { in buildExitThunk()
545 if (ArgTranslation == ThunkArgTranslation::Bitcast) { in buildEntryThunk()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h74 Bitcast, enumerator
173 case LegacyLegalizeActions::Bitcast: in LegalizeActionStep()
174 Action = LegalizeActions::Bitcast; in LegalizeActionStep()
661 return actionIf(LegalizeAction::Bitcast, Predicate, Mutation); in bitcastIf()
H A DLegacyLegalizerInfo.h55 Bitcast, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DCodeExtractor.cpp549 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local
550 for (User *BU : Bitcast->users()) { in findAllocas()
562 << *Bitcast << " in out-of-region lifetime marker " in findAllocas()
582 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local
583 LifetimeMarkerInfo LMI = getLifetimeMarkers(CEAC, Bitcast, ExitBlock); in findAllocas()
585 Bitcasts.push_back(Bitcast); in findAllocas()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/
H A DFunctionSpecialization.cpp484 if (auto *Bitcast = dyn_cast<BitCastInst>(User)) { in getPromotableAlloca() local
485 if (!Bitcast->hasOneUse() || *Bitcast->user_begin() != Call) in getPromotableAlloca()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2485 SDValue Bitcast = N->getOperand(0); in performVECTOR_SHUFFLECombine() local
2486 if (Bitcast.getOpcode() != ISD::BITCAST) in performVECTOR_SHUFFLECombine()
2490 SDValue CastOp = Bitcast.getOperand(0); in performVECTOR_SHUFFLECombine()
2492 EVT DstType = Bitcast.getValueType(); in performVECTOR_SHUFFLECombine()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCompares.cpp3261 auto *Bitcast = dyn_cast<BitCastInst>(Cmp.getOperand(0)); in foldICmpBitCast() local
3262 if (!Bitcast) in foldICmpBitCast()
3267 Value *BCSrcOp = Bitcast->getOperand(0); in foldICmpBitCast()
3268 Type *SrcType = Bitcast->getSrcTy(); in foldICmpBitCast()
3269 Type *DstType = Bitcast->getType(); in foldICmpBitCast()
3306 if (match(Op1, m_APInt(C)) && Bitcast->hasOneUse()) { in foldICmpBitCast()
3361 if (Cmp.isEquality() && C->isAllOnes() && Bitcast->hasOneUse()) { in foldICmpBitCast()
3373 if (Cmp.isEquality() && C->isZero() && Bitcast->hasOneUse() && in foldICmpBitCast()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstr.h1037 return hasProperty(MCID::Bitcast, Type);
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.cpp1812 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg); in legalizeLoadStore() local
1813 MIRBuilder.buildStore(Bitcast.getReg(0), MI.getOperand(1), MMO); in legalizeLoadStore()
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DBuiltinsNVPTX.def587 // Bitcast
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrP10.td2409 (VINSDRX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>;
2456 (VINSDLX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>;
H A DPPCISelLowering.cpp16006 SDNode *Bitcast = *Trunc->use_begin(); in PerformDAGCombine() local
16009 if (Bitcast->getOpcode() != ISD::BITCAST || in PerformDAGCombine()
16010 Bitcast->getValueType(0) != MVT::f32) in PerformDAGCombine()
16017 std::swap(Bitcast, Bitcast2); in PerformDAGCombine()
16051 DCI.CombineTo(Bitcast, FloatLoad2); in PerformDAGCombine()
18024 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0)); in combineTRUNCATE() local
18026 ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Bitcast, in combineTRUNCATE()
H A DPPCInstrVSX.td1815 def Bitcast {
3579 def : Pat<(i32 (bitconvert f32:$A)), Bitcast.FltToInt>;
3589 def : Pat<(i64 (bitconvert f64:$A)), Bitcast.DblToLong>;
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVSymbolicOperands.td1633 defm Bitcast : OpcodeOperand<124>;
H A DSPIRVInstructionSelector.cpp1944 .addImm(static_cast<uint32_t>(SPIRV::Opcode::Bitcast)) in wrapIntoSpecConstantOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2573 SDValue Bitcast = DAG.getNode(ISD::BITCAST, SL, MVT::i32, A); in LowerFROUND32() local
2575 SDValue Sign = DAG.getNode(ISD::AND, SL, MVT::i32, Bitcast, in LowerFROUND32()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrVFP.td1202 // Bitcast i32 -> f32. NEON prefers to use VMOVDRR.

12