| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LowerAMXType.cpp | 360 void combineLoadBitcast(LoadInst *LD, BitCastInst *Bitcast); 361 void combineBitcastStore(BitCastInst *Bitcast, StoreInst *ST); 362 bool transformBitcast(BitCastInst *Bitcast); 370 void X86LowerAMXType::combineLoadBitcast(LoadInst *LD, BitCastInst *Bitcast) { in combineLoadBitcast() argument 372 Use &U = *(Bitcast->use_begin()); in combineLoadBitcast() 376 IRBuilder<> Builder(Bitcast); in combineLoadBitcast() 384 Bitcast->replaceAllUsesWith(NewInst); in combineLoadBitcast() 394 void X86LowerAMXType::combineBitcastStore(BitCastInst *Bitcast, StoreInst *ST) { in combineBitcastStore() argument 396 Value *Tile = Bitcast->getOperand(0); in combineBitcastStore() 409 if (Bitcast->hasOneUse()) in combineBitcastStore() [all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 165 Bitcast, enumerator 350 bool isBitcast() const { return Flags & (1ULL << MCID::Bitcast); } in isBitcast()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPreLegalizerCombiner.cpp | 198 auto Bitcast = B.buildBitcast({S32}, CvtPk); in applyClampI64ToI16() local 202 {MinBoundaryDst.getReg(0), Bitcast.getReg(0), MaxBoundaryDst.getReg(0)}, in applyClampI64ToI16()
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| H A D | AMDGPURegisterBankInfo.cpp | 1751 auto Bitcast = B.buildBitcast(S32, Src); in unpackV2S16ToS32() local 1754 auto ExtLo = B.buildSExtInReg(S32, Bitcast, 16); in unpackV2S16ToS32() 1755 auto ShiftHi = B.buildAShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32() 1759 auto ShiftHi = B.buildLShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32() 1761 auto ExtLo = B.buildAnd(S32, Bitcast, B.buildConstant(S32, 0xffff)); in unpackV2S16ToS32() 1766 return std::pair(Bitcast.getReg(0), ShiftHi.getReg(0)); in unpackV2S16ToS32()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.cpp | 60 case Bitcast: in operator <<() 184 case Bitcast: { in mutationIsSane()
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| H A D | LegacyLegalizerInfo.cpp | 45 case Bitcast: in operator <<() 260 case Bitcast: in findAction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 446 auto Bitcast = in legalizeCustom() local 453 MIRBuilder.buildFSub(Dst, Bitcast, TwoP52FP); in legalizeCustom() 455 MachineInstrBuilder ResF64 = MIRBuilder.buildFSub(s64, Bitcast, TwoP52FP); in legalizeCustom()
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| H A D | MipsISelLowering.cpp | 5190 Register Bitcast = MRI.createVirtualRegister(&Mips::MSA128WRegClass); in emitSTR_D() local 5193 BuildMI(*BB, I, DL, TII->get(Mips::COPY)).addDef(Bitcast).addUse(StoreVal); in emitSTR_D() 5196 .addUse(Bitcast) in emitSTR_D() 5200 .addUse(Bitcast) in emitSTR_D()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Arm64ECCallLowering.cpp | 52 Bitcast, enumerator 311 ThunkArgTranslation::Bitcast}; in canonicalizeThunkType() 461 if (ArgTranslation == ThunkArgTranslation::Bitcast) { in buildExitThunk() 539 if (ArgTranslation == ThunkArgTranslation::Bitcast) { in buildEntryThunk()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | CodeExtractor.cpp | 552 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local 553 for (User *BU : Bitcast->users()) { in findAllocas() 562 << *Bitcast << " in out-of-region lifetime marker " in findAllocas() 582 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local 583 LifetimeMarkerInfo LMI = getLifetimeMarkers(CEAC, Bitcast, ExitBlock); in findAllocas() 585 Bitcasts.push_back(Bitcast); in findAllocas()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.h | 75 Bitcast, enumerator 172 case LegacyLegalizeActions::Bitcast: in LegalizeActionStep() 173 Action = LegalizeActions::Bitcast; in LegalizeActionStep() 701 return actionIf(LegalizeAction::Bitcast, Predicate, Mutation); in bitcastIf()
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| H A D | LegacyLegalizerInfo.h | 56 Bitcast, enumerator
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGHLSLBuiltins.cpp | 129 Value *Bitcast = CGF->Builder.CreateBitCast(Op0, DestTy); in handleHlslSplitdouble() local 131 LowBits = CGF->Builder.CreateExtractElement(Bitcast, (uint64_t)0); in handleHlslSplitdouble() 132 HighBits = CGF->Builder.CreateExtractElement(Bitcast, 1); in handleHlslSplitdouble()
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| H A D | CGObjCMac.cpp | 6669 llvm::Constant *Bitcast = in emitMethodConstant() local 6671 method.addSignedPointer(Bitcast, Schema, GlobalDecl(), QualType()); in emitMethodConstant()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2895 SDValue Bitcast = N->getOperand(0); in performVECTOR_SHUFFLECombine() local 2896 if (Bitcast.getOpcode() != ISD::BITCAST) in performVECTOR_SHUFFLECombine() 2900 SDValue CastOp = Bitcast.getOperand(0); in performVECTOR_SHUFFLECombine() 2902 EVT DstType = Bitcast.getValueType(); in performVECTOR_SHUFFLECombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 3408 auto *Bitcast = dyn_cast<BitCastInst>(Cmp.getOperand(0)); in foldICmpBitCast() local 3409 if (!Bitcast) in foldICmpBitCast() 3414 Value *BCSrcOp = Bitcast->getOperand(0); in foldICmpBitCast() 3415 Type *SrcType = Bitcast->getSrcTy(); in foldICmpBitCast() 3416 Type *DstType = Bitcast->getType(); in foldICmpBitCast() 3453 if (match(Op1, m_APInt(C)) && Bitcast->hasOneUse()) { in foldICmpBitCast() 3508 if (Cmp.isEquality() && C->isAllOnes() && Bitcast->hasOneUse()) { in foldICmpBitCast() 3520 if (Cmp.isEquality() && C->isZero() && Bitcast->hasOneUse() && in foldICmpBitCast()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1035 return hasProperty(MCID::Bitcast, Type);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1953 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg); in legalizeLoadStore() local 1954 MIRBuilder.buildStore(Bitcast.getReg(0), MI.getOperand(1), MMO); in legalizeLoadStore()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVSymbolicOperands.td | 1699 defm Bitcast : OpcodeOperand<124>; 1796 defm Bitcast : SpecConstantOpOperandsOperand<124, [], []>;
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| H A D | SPIRVInstructionSelector.cpp | 2866 .addImm(static_cast<uint32_t>(SPIRV::Opcode::Bitcast)) in wrapIntoSpecConstantOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrP10.td | 2415 (VINSDRX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>; 2462 (VINSDLX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>;
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| H A D | PPCISelLowering.cpp | 16899 SDNode *Bitcast = *Trunc->user_begin(); in PerformDAGCombine() local 16902 if (Bitcast->getOpcode() != ISD::BITCAST || in PerformDAGCombine() 16903 Bitcast->getValueType(0) != MVT::f32) in PerformDAGCombine() 16910 std::swap(Bitcast, Bitcast2); in PerformDAGCombine() 16944 DCI.CombineTo(Bitcast, FloatLoad2); in PerformDAGCombine() 19026 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0)); in combineTRUNCATE() local 19028 ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Bitcast, in combineTRUNCATE()
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| H A D | PPCInstrVSX.td | 1813 def Bitcast { 3577 def : Pat<(i32 (bitconvert f32:$A)), Bitcast.FltToInt>; 3587 def : Pat<(i64 (bitconvert f64:$A)), Bitcast.DblToLong>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2415 SDValue Bitcast = DAG.getNode(ISD::BITCAST, SL, MVT::i32, A); in LowerFROUND32() local 2417 SDValue Sign = DAG.getNode(ISD::AND, SL, MVT::i32, Bitcast, in LowerFROUND32()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrVFP.td | 1217 // Bitcast i32 -> f32. NEON prefers to use VMOVDRR.
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