Searched refs:BasePtrReg (Results 1 – 3 of 3) sorted by relevance
1138 Register BasePtrReg = in emitPrologue() local1243 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg) in emitPrologue()1266 bool BPSaved = FuncInfo->hasPrologEpilogSGPRSpillEntry(BasePtrReg); in emitPrologue()1602 Register BasePtrReg = TRI->getBaseRegister(); in determinePrologEpilogSGPRSaves() local1603 assert(!MFI->hasPrologEpilogSGPRSpillEntry(BasePtrReg) && in determinePrologEpilogSGPRSaves()1605 getVGPRSpillLaneOrTempRegister(MF, LiveUnits, BasePtrReg); in determinePrologEpilogSGPRSaves()1853 Register BasePtrReg = RI->getBaseRegister(); in assignCalleeSavedSpillSlots() local1857 FuncInfo->getScratchSGPRCopyDstReg(BasePtrReg); in assignCalleeSavedSpillSlots()1873 } else if (CS.getReg() == BasePtrReg.asMCReg() && in assignCalleeSavedSpillSlots()
730 MCRegister BasePtrReg = getBaseRegister(); in getReservedRegs() local731 reserveRegisterTuples(Reserved, BasePtrReg); in getReservedRegs()732 assert(!isSubRegister(ScratchRSrcReg, BasePtrReg)); in getReservedRegs()
1145 Register BasePtrReg = SrcRegs[0]; in applyMappingLoad() local1147 MRI.setType(BasePtrReg, PtrTy); in applyMappingLoad()