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Searched refs:BaseOps2 (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.h176 ArrayRef<const MachineOperand *> BaseOps2,
H A DRISCVInstrInfo.cpp2660 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBasePtr()
2664 if (BaseOps1.front()->isIdenticalTo(*BaseOps2.front())) in memOpsHaveSameBasePtr()
2690 bool OffsetIsScalable1, ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps()
2695 if (!BaseOps1.empty() && !BaseOps2.empty()) { in shouldClusterMemOps()
2697 const MachineInstr &SecondLdSt = *BaseOps2.front()->getParent(); in shouldClusterMemOps()
2698 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2)) in shouldClusterMemOps()
2700 } else if (!BaseOps1.empty() || !BaseOps2.empty()) { in shouldClusterMemOps()
2653 memOpsHaveSameBasePtr(const MachineInstr & MI1,ArrayRef<const MachineOperand * > BaseOps1,const MachineInstr & MI2,ArrayRef<const MachineOperand * > BaseOps2) memOpsHaveSameBasePtr() argument
2683 shouldClusterMemOps(ArrayRef<const MachineOperand * > BaseOps1,int64_t Offset1,bool OffsetIsScalable1,ArrayRef<const MachineOperand * > BaseOps2,int64_t Offset2,bool OffsetIsScalable2,unsigned ClusterSize,unsigned NumBytes) const shouldClusterMemOps() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h326 ArrayRef<const MachineOperand *> BaseOps2,
H A DAArch64InstrInfo.cpp4313 bool OffsetIsScalable1, ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
4316 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
4318 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h577 ArrayRef<const MachineOperand *> BaseOps2,
H A DPPCInstrInfo.cpp2890 bool OffsetIsScalable1, ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
2894 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
2896 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp521 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBasePtr() argument
525 if (BaseOps1.front()->isIdenticalTo(*BaseOps2.front())) in memOpsHaveSameBasePtr()
551 ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
557 if (!BaseOps1.empty() && !BaseOps2.empty()) { in shouldClusterMemOps()
559 const MachineInstr &SecondLdSt = *BaseOps2.front()->getParent(); in shouldClusterMemOps()
560 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2)) in shouldClusterMemOps()
562 } else if (!BaseOps1.empty() || !BaseOps2.empty()) { in shouldClusterMemOps()
3679 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBaseOperands() argument
3680 if (BaseOps1.size() != BaseOps2.size()) in memOpsHaveSameBaseOperands()
3683 if (!BaseOps1[I]->isIdenticalTo(*BaseOps2[I])) in memOpsHaveSameBaseOperands()
H A DSIInstrInfo.h248 ArrayRef<const MachineOperand *> BaseOps2,
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1563 ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument