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Searched refs:BaseOps2 (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.h180 ArrayRef<const MachineOperand *> BaseOps2,
H A DRISCVInstrInfo.cpp3204 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBasePtr() argument
3208 if (BaseOps1.front()->isIdenticalTo(*BaseOps2.front())) in memOpsHaveSameBasePtr()
3234 bool OffsetIsScalable1, ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
3239 if (!BaseOps1.empty() && !BaseOps2.empty()) { in shouldClusterMemOps()
3241 const MachineInstr &SecondLdSt = *BaseOps2.front()->getParent(); in shouldClusterMemOps()
3242 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2)) in shouldClusterMemOps()
3244 } else if (!BaseOps1.empty() || !BaseOps2.empty()) { in shouldClusterMemOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h687 ArrayRef<const MachineOperand *> BaseOps2,
H A DPPCInstrInfo.cpp2913 bool OffsetIsScalable1, ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
2917 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
2919 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h332 ArrayRef<const MachineOperand *> BaseOps2,
H A DAArch64InstrInfo.cpp4898 bool OffsetIsScalable1, ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
4901 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
4903 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp531 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBasePtr() argument
535 if (BaseOps1.front()->isIdenticalTo(*BaseOps2.front())) in memOpsHaveSameBasePtr()
561 ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument
568 if (!BaseOps1.empty() && !BaseOps2.empty()) { in shouldClusterMemOps()
570 const MachineInstr &SecondLdSt = *BaseOps2.front()->getParent(); in shouldClusterMemOps()
571 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2)) in shouldClusterMemOps()
577 } else if (!BaseOps1.empty() || !BaseOps2.empty()) { in shouldClusterMemOps()
3804 ArrayRef<const MachineOperand *> BaseOps2) { in memOpsHaveSameBaseOperands() argument
3805 if (BaseOps1.size() != BaseOps2.size()) in memOpsHaveSameBaseOperands()
3808 if (!BaseOps1[I]->isIdenticalTo(*BaseOps2[I])) in memOpsHaveSameBaseOperands()
H A DSIInstrInfo.h259 ArrayRef<const MachineOperand *> BaseOps2,
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1629 ArrayRef<const MachineOperand *> BaseOps2, in shouldClusterMemOps() argument