Searched refs:BaseMO (Results 1 – 5 of 5) sorted by relevance
122 const MachineOperand &BaseMO = MI->getOperand(OpNum); in PrintAsmMemoryOperand() local124 assert(BaseMO.isReg() && "Unexpected base pointer for inline asm memory operand."); in PrintAsmMemoryOperand()132 O << "(" << BPFInstPrinter::getRegisterName(BaseMO.getReg()) << " - " << -Offset << ")"; in PrintAsmMemoryOperand()134 O << "(" << BPFInstPrinter::getRegisterName(BaseMO.getReg()) << " + " << Offset << ")"; in PrintAsmMemoryOperand()
123 const MachineOperand &BaseMO = MI->getOperand(OpNo); in PrintAsmMemoryOperand() local125 if (!BaseMO.isReg()) in PrintAsmMemoryOperand()128 OS << "$" << LoongArchInstPrinter::getRegisterName(BaseMO.getReg()); in PrintAsmMemoryOperand()
197 hardenLoadAddr(MachineInstr &MI, MachineOperand &BaseMO,1331 MachineOperand &BaseMO = in tracePredStateThroughBlocksAndHarden() local1339 if (!BaseMO.isFI() && BaseMO.getReg() != X86::RIP && in tracePredStateThroughBlocksAndHarden()1340 BaseMO.getReg() != X86::NoRegister) in tracePredStateThroughBlocksAndHarden()1341 BaseReg = BaseMO.getReg(); in tracePredStateThroughBlocksAndHarden()1402 MachineOperand &BaseMO = in tracePredStateThroughBlocksAndHarden() local1406 hardenLoadAddr(MI, BaseMO, IndexMO, AddrRegToHardenedReg); in tracePredStateThroughBlocksAndHarden()1565 MachineInstr &MI, MachineOperand &BaseMO, MachineOperand &IndexMO, in hardenLoadAddr() argument1576 if (BaseMO.isFI()) { in hardenLoadAddr()1582 } else if (BaseMO.getReg() == X86::RSP) { in hardenLoadAddr()[all …]
780 const MachineOperand &BaseMO = in instrUsesRegToAccessMemory() local784 return (BaseMO.isReg() && BaseMO.getReg() != X86::NoRegister && in instrUsesRegToAccessMemory()785 TRI->regsOverlap(BaseMO.getReg(), Reg)) || in instrUsesRegToAccessMemory()
589 const MachineOperand &BaseMO = MI->getOperand(OpNum); in PrintAsmMemoryOperand() local591 assert(BaseMO.isReg() && in PrintAsmMemoryOperand()616 O << Offset << "($" << MipsInstPrinter::getRegisterName(BaseMO.getReg()) in PrintAsmMemoryOperand()