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Searched refs:BaseInst (Results 1 – 11 of 11) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZa.td71 multiclass AMOCASPat<string AtomicOp, string BaseInst, ValueType vt = XLenVT,
77 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
81 (!cast<RVInst>(BaseInst#"_AQ") GPR:$cmp, GPR:$addr, GPR:$new)>;
85 (!cast<RVInst>(BaseInst#"_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
89 (!cast<RVInst>(BaseInst#"_AQ_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
93 (!cast<RVInst>(BaseInst#"_AQ_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
99 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
103 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
107 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
111 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
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H A DRISCVInstrInfoA.td191 multiclass AMOPat<string AtomicOp, string BaseInst, ValueType vt = XLenVT,
195 !cast<RVInst>(BaseInst), vt>;
197 !cast<RVInst>(BaseInst#"_AQ"), vt>;
199 !cast<RVInst>(BaseInst#"_RL"), vt>;
201 !cast<RVInst>(BaseInst#"_AQ_RL"), vt>;
203 !cast<RVInst>(BaseInst#"_AQ_RL"), vt>;
207 !cast<RVInst>(BaseInst), vt>;
209 !cast<RVInst>(BaseInst), vt>;
211 !cast<RVInst>(BaseInst), vt>;
213 !cast<RVInst>(BaseInst), vt>;
[all …]
H A DRISCVGatherScatterLowering.cpp363 if (auto *BaseInst = dyn_cast<Instruction>(Base); in determineBaseAndStride() local
364 BaseInst && BaseInst->getType()->isVectorTy()) { in determineBaseAndStride()
368 auto [BaseBase, Stride] = determineBaseAndStride(BaseInst, Builder); in determineBaseAndStride()
H A DRISCVInstrInfoVPseudos.td1028 class VPseudoNullaryPseudoM<string BaseInst> :
1036 let BaseInstr = !cast<Instruction>(BaseInst);
2078 multiclass VPseudoNullaryPseudoM <string BaseInst> {
2081 def "_M_" # mti.BX : VPseudoNullaryPseudoM<BaseInst # "_MM">,
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonLoadStoreWidening.cpp112 void createGroup(MachineInstr *BaseInst, InstrGroup &Group);
337 void HexagonLoadStoreWidening::createGroup(MachineInstr *BaseInst, in createGroup() argument
339 assert(handledInstType(BaseInst) && "Unexpected instruction"); in createGroup()
340 unsigned BaseReg = getBaseAddressRegister(BaseInst); in createGroup()
343 Group.push_back(BaseInst); in createGroup()
344 LLVM_DEBUG(dbgs() << "BaseInst: "; BaseInst->dump()); in createGroup()
345 auto End = BaseInst->getParent()->end(); in createGroup()
346 auto I = BaseInst->getIterator(); in createGroup()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp380 uint32_t BaseInst = ReadFunc(Bytes.data() + 4); in getInstruction() local
381 uint64_t Inst = BaseInst | (uint64_t)Prefix << 32; in getInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DGuardWidening.cpp840 auto *BaseInst = dyn_cast<Instruction>(Check.getBase()); in parseRangeChecks() local
841 assert((!BaseInst || DT.isReachableFromEntry(BaseInst->getParent())) && in parseRangeChecks()
H A DRewriteStatepointsForGC.cpp1117 Instruction *BaseInst = I->clone(); in findBasePointer() local
1118 BaseInst->insertBefore(I->getIterator()); in findBasePointer()
1119 BaseInst->setName(getMangledName(I)); in findBasePointer()
1121 BaseInst->setMetadata("is_base_value", MDNode::get(I->getContext(), {})); in findBasePointer()
1122 States[I] = BDVState(I, BDVState::Conflict, BaseInst); in findBasePointer()
1123 setKnownBase(BaseInst, /* IsKnownBase */true, KnownBases); in findBasePointer()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DBUFInstructions.td533 multiclass MUBUF_Pseudo_Load_Pats_Common<string BaseInst, ValueType load_vt = i32, SDPatternOperato…
534 def : MUBUF_Offset_Load_Pat<!cast<Instruction>(BaseInst#"_OFFSET"), load_vt, ld>;
535 def : MUBUF_Addr64_Load_Pat<!cast<Instruction>(BaseInst#"_ADDR64"), load_vt, ld>;
538 multiclass MUBUF_Pseudo_Load_Pats<string BaseInst, ValueType load_vt = i32, SDPatternOperator ld = …
540 defm : MUBUF_Pseudo_Load_Pats_Common<BaseInst, load_vt, ld>;
542 defm : MUBUF_Pseudo_Load_Pats_Common<BaseInst # "_VBUFFER", load_vt, ld>;
613 multiclass MUBUF_Pseudo_Store_Pats_Common<string BaseInst, ValueType store_vt = i32, SDPatternOpera…
617 …(!cast<MUBUF_Pseudo>(BaseInst # _OFFSET) store_vt:$vdata, v4i32:$srsrc, i32:$soffset, i32:$offset)…
621 …(!cast<MUBUF_Pseudo>(BaseInst # _ADDR64) store_vt:$vdata, i64:$vaddr, v4i32:$srsrc, i32:$soffset, …
624 multiclass MUBUF_Pseudo_Store_Pats<string BaseInst, ValueType store_vt = i32, SDPatternOperator st …
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H A DVOP3PInstructions.td892 class ScaledMAIInst<string OpName, MAIInst BaseInst, SDPatternOperator node> :
893 MAIInst<OpName, BaseInst.Pfl, node, /*Scaled=*/true> {
895 let InOperandList = !con(BaseInst.InOperandList,
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp1411 auto *BaseInst = cast<CmpInst>(MainOp); in getSameOpcode() local
1412 Type *Ty0 = BaseInst->getOperand(0)->getType(); in getSameOpcode()
1429 if (isCmpSameOrSwapped(BaseInst, Inst, TLI)) in getSameOpcode()